[PATCH] D69130: [RISCV] Implement the TargetLowering::getRegisterByName hook

[Sam Elliott via Phabricator via llvm-commits]

lenary added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2899
+#define GET_REGISTER_MATCHER
+#include "RISCVGenAsmMatcher.inc"
+
----------------
thakis wrote:
> This seems a bit strange to me from a dependency point of view. GenAsmMatcher conceptually belongs to RISCVAsmParser, but RISCVCodeGen doesn't depend on RISCVAsmParser. I believe other targets don't include GenAsmMatcher.inc from their codegen libraries (except aarch64, but it's strange there too -- added in D56305, +phosek).
It seems reasonable to use the canonical register name matching, here, rather than a big duplicated StringSwitch. Is there a more reasonable way of avoiding duplication but still using the canonical register information from tablegen?


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  https://reviews.llvm.org/D69130/new/

https://reviews.llvm.org/D69130