[llvm] b7b170c - [MachineVerifier] Improve verification of live-in lists.
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 4 07:23:39 PST 2019
Author: Jonas Paulsson
Date: 2019-11-04T16:22:00+01:00
New Revision: b7b170c9b46ab4c0a10ecf1d9d5832e70ca992d5
URL: https://github.com/llvm/llvm-project/commit/b7b170c9b46ab4c0a10ecf1d9d5832e70ca992d5
DIFF: https://github.com/llvm/llvm-project/commit/b7b170c9b46ab4c0a10ecf1d9d5832e70ca992d5.diff
LOG: [MachineVerifier] Improve verification of live-in lists.
MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers without
aliases and that are neither allocatable or reserved, such as the SystemZ::CC
register.
The MachineVerifier earlier only catched the case of a live-in use without
an entry in the live-in list (as "using an undefined physical register").
A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.
Review: Quentin Colombet
https://reviews.llvm.org/D68267
Added:
llvm/test/MachineVerifier/live-ins-01.mir
llvm/test/MachineVerifier/live-ins-02.mir
llvm/test/MachineVerifier/live-ins-03.mir
Modified:
llvm/include/llvm/CodeGen/LivePhysRegs.h
llvm/lib/CodeGen/MachineVerifier.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/LivePhysRegs.h b/llvm/include/llvm/CodeGen/LivePhysRegs.h
index 50da0b3d5c48..085893462a08 100644
--- a/llvm/include/llvm/CodeGen/LivePhysRegs.h
+++ b/llvm/include/llvm/CodeGen/LivePhysRegs.h
@@ -137,6 +137,9 @@ class LivePhysRegs {
/// Live out registers are the union of the live-in registers of the successor
/// blocks and pristine registers. Live out registers of the end block are the
/// callee saved registers.
+ /// If a register is not added by this method, it is guaranteed to not be
+ /// live out from MBB, although a sub-register may be. This is true
+ /// both before and after regalloc.
void addLiveOuts(const MachineBasicBlock &MBB);
/// Adds all live-out registers of basic block \p MBB but skips pristine
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 969743edca52..b5dea2831855 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -2304,6 +2304,32 @@ void MachineVerifier::visitMachineFunctionAfter() {
if (LiveInts)
verifyLiveIntervals();
+ // Check live-in list of each MBB. If a register is live into MBB, check
+ // that the register is in regsLiveOut of each predecessor block. Since
+ // this must come from a definition in the predecesssor or its live-in
+ // list, this will catch a live-through case where the predecessor does not
+ // have the register in its live-in list. This currently only checks
+ // registers that have no aliases, are not allocatable and are not
+ // reserved, which could mean a condition code register for instance.
+ if (MRI->tracksLiveness())
+ for (const auto &MBB : *MF)
+ for (MachineBasicBlock::RegisterMaskPair P : MBB.liveins()) {
+ MCPhysReg LiveInReg = P.PhysReg;
+ bool hasAliases = MCRegAliasIterator(LiveInReg, TRI, false).isValid();
+ if (hasAliases || isAllocatable(LiveInReg) || isReserved(LiveInReg))
+ continue;
+ for (const MachineBasicBlock *Pred : MBB.predecessors()) {
+ BBInfo &PInfo = MBBInfoMap[Pred];
+ if (!PInfo.regsLiveOut.count(LiveInReg)) {
+ report("Live in register not found to be live out from predecessor.",
+ &MBB);
+ errs() << TRI->getName(LiveInReg)
+ << " not found to be live out from "
+ << printMBBReference(*Pred) << "\n";
+ }
+ }
+ }
+
for (auto CSInfo : MF->getCallSitesInfo())
if (!CSInfo.first->isCall())
report("Call site info referencing instruction that is not call", MF);
diff --git a/llvm/test/MachineVerifier/live-ins-01.mir b/llvm/test/MachineVerifier/live-ins-01.mir
new file mode 100644
index 000000000000..52d42f72ec46
--- /dev/null
+++ b/llvm/test/MachineVerifier/live-ins-01.mir
@@ -0,0 +1,56 @@
+# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+
+# Test that a the machine verifier reports an error when a register in
+# liveins is not liveout from predecessor.
+
+---
+name: f1
+tracksRegLiveness: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r2l, $r3l
+
+ %1:gr32bit = COPY $r3l
+ %0:gr32bit = COPY $r2l
+ CHIMux %0, 0, implicit-def $cc
+
+ bb.1:
+ liveins: $cc
+
+ bb.2:
+ liveins: $cc
+
+ %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc
+ $r2l = COPY %2
+ Return implicit $r2l
+...
+
+# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. ***
+# CHECK:- function: f2
+# CHECK:- basic block: %bb.2
+# CHECK:CC not found to be live out from %bb.1
+---
+name: f2
+tracksRegLiveness: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r2l, $r3l
+
+ %1:gr32bit = COPY $r3l
+ %0:gr32bit = COPY $r2l
+ CHIMux %0, 0, implicit-def $cc
+
+ bb.1:
+ liveins: $cc
+ KILL killed $cc
+
+ bb.2:
+ liveins: $cc
+
+ %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc
+ $r2l = COPY %2
+ Return implicit $r2l
+
+...
diff --git a/llvm/test/MachineVerifier/live-ins-02.mir b/llvm/test/MachineVerifier/live-ins-02.mir
new file mode 100644
index 000000000000..0ffeb0ce1ad8
--- /dev/null
+++ b/llvm/test/MachineVerifier/live-ins-02.mir
@@ -0,0 +1,31 @@
+# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+
+# Test that a the machine verifier reports an error when a register in
+# liveins is not liveout from predecessor.
+
+---
+name: f1
+tracksRegLiveness: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r2l, $r3l
+
+ %1:gr32bit = COPY $r3l
+ %0:gr32bit = COPY $r2l
+ CHIMux %0, 0, implicit-def $cc
+
+ bb.1:
+
+ bb.2:
+ liveins: $cc
+
+ %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc
+ $r2l = COPY %2
+ Return implicit $r2l
+...
+
+# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. ***
+# CHECK:- function: f1
+# CHECK:- basic block: %bb.2
+# CHECK:CC not found to be live out from %bb.1
diff --git a/llvm/test/MachineVerifier/live-ins-03.mir b/llvm/test/MachineVerifier/live-ins-03.mir
new file mode 100644
index 000000000000..9151a18f0df7
--- /dev/null
+++ b/llvm/test/MachineVerifier/live-ins-03.mir
@@ -0,0 +1,35 @@
+# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s
+
+# Test that a the machine verifier reports an error when a register in
+# liveins is not liveout from predecessor.
+
+---
+name: f1
+tracksRegLiveness: true
+machineFunctionInfo: {}
+body: |
+ bb.0:
+ liveins: $r2l, $r3l
+
+ %1:gr32bit = COPY $r3l
+ %0:gr32bit = COPY $r2l
+ CHIMux %0, 0, implicit-def $cc
+
+ bb.1:
+ liveins: $cc
+ BRC 14, 8, %bb.3, implicit $cc
+
+ bb.2:
+
+ bb.3:
+ liveins: $cc
+
+ %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc
+ $r2l = COPY %2
+ Return implicit $r2l
+...
+
+# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. ***
+# CHECK:- function: f1
+# CHECK:- basic block: %bb.3
+# CHECK:CC not found to be live out from %bb.2
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