[llvm] 56c2293 - [LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by InlineSpiller
Bjorn Pettersson via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 1 08:41:22 PDT 2019
Author: Bjorn Pettersson
Date: 2019-11-01T16:25:32+01:00
New Revision: 56c22931bdfafe8257e610cb9f29b9d64478f812
URL: https://github.com/llvm/llvm-project/commit/56c22931bdfafe8257e610cb9f29b9d64478f812
DIFF: https://github.com/llvm/llvm-project/commit/56c22931bdfafe8257e610cb9f29b9d64478f812.diff
LOG: [LDV][RAGreedy] Inform LiveDebugVariables about new VRegs added by InlineSpiller
Summary:
Make sure RAGreedy informs LiveDebugVariables about new VRegs
that is introduced at spill by InlineSpiller.
Consider this example
LDV: !"var" [48r;128r):0 Loc0=%2
48B %2 = ...
...
128B %7 = ADD %2, ...
If %2 is spilled the InlineSpiller will insert spill/reload
instructions and introduces some new vregs. So we get
48B %4 = ...
56B spill %4
...
120B reload %5
128B %3 = ADD %5, ...
In the past we did not inform LDV about this, and when reintroducing
DBG_VALUE instruction LDV still got information that "var" had the
location of the spilled register %2 for the interval [48r;128r).
The result was bad, since we mapped "var" to the spill slot even
before the spill happened:
%4 = ...
DBG_VALUE %spill.0, !"var"
spill %4 to %spill.0
...
reload %5
%3 = ADD %5, ...
This patch will inform LDV about the interval split introduced
due to spilling. So the location map in LDV will become
!"var" [48r;56r):1 [56r;120r):0 [120r;128r):2 Loc0=%2 Loc1=%4 Loc2=%5
And when inserting DBG_VALUE instructions we get
%4 = ...
DBG_VALUE %4, !"var"
spill %4 to %spill.0
DBG_VALUE %spill.0, !"var"
...
reload %5
DBG_VALUE %5, !"var"
%3 = ADD %5, ...
Fixes: https://bugs.llvm.org/show_bug.cgi?id=38899
Reviewers: jmorse, vsk, aprantl
Reviewed By: jmorse
Subscribers: dstenb, wuzish, MatzeB, qcolombet, nemanjai, hiraditya, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69584
Added:
llvm/test/CodeGen/PowerPC/pr38899-split-register-at-spill.mir
Modified:
llvm/lib/CodeGen/LiveDebugVariables.cpp
llvm/lib/CodeGen/RegAllocGreedy.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index 253bdbb11d57..cace04430adc 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -255,6 +255,25 @@ class UserValue {
return locations.size() - 1;
}
+ /// Remove (recycle) a location number. If \p LocNo still is used by the
+ /// locInts nothing is done.
+ void removeLocationIfUnused(unsigned LocNo) {
+ // Bail out if LocNo still is used.
+ for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
+ DbgValueLocation Loc = I.value();
+ if (Loc.locNo() == LocNo)
+ return;
+ }
+ // Remove the entry in the locations vector, and adjust all references to
+ // location numbers above the removed entry.
+ locations.erase(locations.begin() + LocNo);
+ for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
+ DbgValueLocation Loc = I.value();
+ if (!Loc.isUndef() && Loc.locNo() > LocNo)
+ I.setValueUnchecked(Loc.changeLocNo(Loc.locNo() - 1));
+ }
+ }
+
/// Ensure that all virtual register locations are mapped.
void mapVirtRegs(LDVImpl *LDV);
@@ -1073,23 +1092,14 @@ UserValue::splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
}
}
- // Finally, remove any remaining OldLocNo intervals and OldLocNo itself.
- locations.erase(locations.begin() + OldLocNo);
- LocMapI.goToBegin();
- while (LocMapI.valid()) {
- DbgValueLocation v = LocMapI.value();
- if (v.locNo() == OldLocNo) {
- LLVM_DEBUG(dbgs() << "Erasing [" << LocMapI.start() << ';'
- << LocMapI.stop() << ")\n");
- LocMapI.erase();
- } else {
- // Undef values always have location number UndefLocNo, so don't change
- // locNo in that case. See getLocationNo().
- if (!v.isUndef() && v.locNo() > OldLocNo)
- LocMapI.setValueUnchecked(v.changeLocNo(v.locNo() - 1));
- ++LocMapI;
- }
- }
+ // Finally, remove OldLocNo unless it is still used by some interval in the
+ // locInts map. One case when OldLocNo still is in use is when the register
+ // has been spilled. In such situations the spilled register is kept as a
+ // location until rewriteLocations is called (VirtRegMap is mapping the old
+ // register to the spill slot). So for a while we can have locations that map
+ // to virtual registers that have been removed from both the MachineFunction
+ // and from LiveIntervals.
+ removeLocationIfUnused(OldLocNo);
LLVM_DEBUG({
dbgs() << "Split result: \t";
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index d27db678f02a..fc12a499438a 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -3126,6 +3126,11 @@ unsigned RAGreedy::selectOrSplitImpl(LiveInterval &VirtReg,
spiller().spill(LRE);
setStage(NewVRegs.begin(), NewVRegs.end(), RS_Done);
+ // Tell LiveDebugVariables about the new ranges. Ranges not being covered by
+ // the new regs are kept in LDV (still mapping to the old register), until
+ // we rewrite spilled locations in LDV at a later stage.
+ DebugVars->splitRegister(VirtReg.reg, LRE.regs(), *LIS);
+
if (VerifyEnabled)
MF->verify(this, "After spilling");
}
diff --git a/llvm/test/CodeGen/PowerPC/pr38899-split-register-at-spill.mir b/llvm/test/CodeGen/PowerPC/pr38899-split-register-at-spill.mir
new file mode 100644
index 000000000000..06b8eed663e5
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/pr38899-split-register-at-spill.mir
@@ -0,0 +1,74 @@
+# RUN: llc -mtriple=powerpc64le-unknown-unknown -start-before=greedy -stop-after=virtregrewriter -o - %s | FileCheck %s
+
+--- |
+ ; Function Attrs: nounwind
+ define signext i32 @test1(i32 signext %a, i32 signext %b) local_unnamed_addr !dbg !8 {
+ entry:
+ %mul = mul nsw i32 %b, %a, !dbg !18
+ call void @llvm.dbg.value(metadata i32 %mul, metadata !15, metadata !DIExpression()), !dbg !19
+ tail call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"() #2, !dbg !20, !srcloc !25
+ ret i32 %mul, !dbg !26
+ }
+
+ ; Function Attrs: nounwind readnone speculatable willreturn
+ declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!3, !4, !5, !6}
+ !llvm.ident = !{!7}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 8.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None)
+ !1 = !DIFile(filename: "foo.c", directory: "/")
+ !2 = !{}
+ !3 = !{i32 2, !"Dwarf Version", i32 4}
+ !4 = !{i32 2, !"Debug Info Version", i32 3}
+ !5 = !{i32 1, !"wchar_size", i32 4}
+ !6 = !{i32 7, !"PIC Level", i32 2}
+ !7 = !{!"clang version 8.0.0"}
+ !8 = distinct !DISubprogram(name: "test1", scope: !1, file: !1, line: 8, type: !9, scopeLine: 8, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !12)
+ !9 = !DISubroutineType(types: !10)
+ !10 = !{!11, !11, !11}
+ !11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+ !12 = !{!15}
+ !15 = !DILocalVariable(name: "c", scope: !8, file: !1, line: 9, type: !11)
+ !16 = !DILocation(line: 8, column: 14, scope: !8)
+ !17 = !DILocation(line: 8, column: 21, scope: !8)
+ !18 = !DILocation(line: 9, column: 13, scope: !8)
+ !19 = !DILocation(line: 9, column: 7, scope: !8)
+ !20 = !DILocation(line: 2, column: 3, scope: !21, inlinedAt: !24)
+ !21 = distinct !DISubprogram(name: "force_spill", scope: !1, file: !1, line: 1, type: !22, scopeLine: 1, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !2)
+ !22 = !DISubroutineType(types: !23)
+ !23 = !{null}
+ !24 = distinct !DILocation(line: 10, column: 3, scope: !8)
+ !25 = !{i32 55}
+ !26 = !DILocation(line: 11, column: 3, scope: !8)
+
+...
+---
+name: test1
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x3, $x4
+
+ %4:gprc = nsw MULLW $r4, $r3, debug-location !18
+ DBG_VALUE %4, $noreg, !15, !DIExpression(), debug-location !19
+ INLINEASM &"", 1, 12, implicit-def dead early-clobber $r0, 12, implicit-def early-clobber $r1, 12, implicit-def early-clobber $r2, 12, implicit-def dead early-clobber $r3, 12, implicit-def dead early-clobber $r4, 12, implicit-def dead early-clobber $r5, 12, implicit-def dead early-clobber $r6, 12, implicit-def dead early-clobber $r7, 12, implicit-def dead early-clobber $r8, 12, implicit-def dead early-clobber $r9, 12, implicit-def dead early-clobber $r10, 12, implicit-def dead early-clobber $r11, 12, implicit-def dead early-clobber $r12, 12, implicit-def early-clobber $r13, 12, implicit-def dead early-clobber $r14, 12, implicit-def dead early-clobber $r15, 12, implicit-def dead early-clobber $r16, 12, implicit-def dead early-clobber $r17, 12, implicit-def dead early-clobber $r18, 12, implicit-def dead early-clobber $r19, 12, implicit-def dead early-clobber $r20, 12, implicit-def dead early-clobber $r21, 12, implicit-def dead early-clobber $r22, 12, implicit-def dead early-clobber $r23, 12, implicit-def dead early-clobber $r24, 12, implicit-def dead early-clobber $r25, 12, implicit-def dead early-clobber $r26, 12, implicit-def dead early-clobber $r27, 12, implicit-def dead early-clobber $r28, 12, implicit-def dead early-clobber $r29, 12, implicit-def dead early-clobber $r30, 12, implicit-def early-clobber $r31, !25, debug-location !20
+ %5:g8rc = EXTSW_32_64 %4, debug-location !26
+ $x3 = COPY %5, debug-location !26
+ BLR8 implicit $lr8, implicit $rm, implicit $x3, debug-location !26
+
+...
+
+# Verify that we get three DBG_VALUE instructions. One between the MULLW and
+# the spill, one between the spill and reload, and one after the reload.
+#
+# CHECK-LABEL: name: test1
+# CHECK: renamable [[REG1:\$r[0-9]+]] = nsw MULLW
+# CHECK-NEXT: DBG_VALUE [[REG1]], $noreg, [[VAR:![0-9]+]], !DIExpression(),
+# CHECK-NEXT: STW killed renamable [[REG1]], 0, %stack.0 ::
+# CHECK-NEXT: DBG_VALUE %stack.0, 0, [[VAR]], !DIExpression(),
+# CHECK-NEXT: INLINEASM
+# CHECK-NEXT: renamable [[REG2:\$r[0-9]+]] = LWZ 0, %stack.0,
+# CHECK-NEXT: DBG_VALUE [[REG2]], $noreg, [[VAR]], !DIExpression(),
+# CHECK-NEXT: EXTSW_32_64 killed renamable [[REG2]],
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