[llvm] efacf2c - [test][DebugInfo] Add the test for ARM call site parameters

Djordje Todorovic via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 31 06:46:06 PDT 2019


Author: Djordje Todorovic
Date: 2019-10-31T14:45:50+01:00
New Revision: efacf2ce55d698e5df8173f0d4dacbc7d3c7fd34

URL: https://github.com/llvm/llvm-project/commit/efacf2ce55d698e5df8173f0d4dacbc7d3c7fd34
DIFF: https://github.com/llvm/llvm-project/commit/efacf2ce55d698e5df8173f0d4dacbc7d3c7fd34.diff

LOG: [test][DebugInfo] Add the test for ARM call site parameters

This is addition to D67556.

Patch by Nikola Prica

Added: 
    llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
new file mode 100644
index 000000000000..e7565a7e162a
--- /dev/null
+++ b/llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir
@@ -0,0 +1,171 @@
+# RUN: llc -mtriple=arm-linux-gnueabi -debug-entry-values -filetype=obj -start-after=machineverifier %s -o -| llvm-dwarfdump -| FileCheck %s
+# Following code is used for producing this test case. Note that
+# some of argument loading instruction are modified in order to
+# cover certain cases.
+#
+# extern int func2(int,int,int*);
+# int func1(int arg1, int arg2, int arg3) {
+#   int a = func2(arg1 + 2, arg2 - 4, &arg3);
+#   a += func2(arg3 - 16, arg1 + 8, &a);
+#   return a++;
+# }
+#
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}}"func2")
+# CHECK-NEXT:   DW_AT_low_pc 
+# CHECK: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:   DW_AT_location      (DW_OP_reg2 R2)
+# CHECK-NEXT:   DW_AT_GNU_call_site_value   (DW_OP_breg13 SP+4)
+# CHECK-EMPTY: 
+# CHECK-NEXT: DW_TAG_GNU_call_site_parameter
+# CHECK-NEXT:   DW_AT_location      (DW_OP_reg1 R1)
+# CHECK-NEXT:   DW_AT_GNU_call_site_value   (DW_OP_breg4 R4-4)
+# CHECK: DW_TAG_GNU_call_site
+# CHECK-NEXT:   DW_AT_abstract_origin {{.*}}"func2")
+# CHECK-NEXT:   DW_AT_low_pc 
+# CHECK-EMPTY: 
+# CHECK-NEXT: DW_TAG_GNU_call_site_parameter
+# R2 loads memory location. We can't rely that memory location won't be changed.
+# CHECK-NOT:   DW_AT_location      (DW_OP_reg2 R2)
+# CHECK-NEXT:   DW_AT_location      (DW_OP_reg1 R1)
+# CHECK-NEXT:   DW_AT_GNU_call_site_value   (DW_OP_breg4 R4+8)
+--- |
+  ; ModuleID = 'dbgcall-site-interpretation.c'
+  source_filename = "dbgcall-site-interpretation.c"
+  target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+  target triple = "armv4t-unknown-linux-gnu"
+  
+  ; Function Attrs: nounwind
+  define dso_local arm_aapcscc i32 @func1(i32 %arg1, i32 %arg2, i32 %arg3) local_unnamed_addr #0 !dbg !14 {
+  entry:
+    %arg3.addr = alloca i32, align 4
+    %a = alloca i32, align 4
+    call void @llvm.dbg.value(metadata i32 %arg1, metadata !18, metadata !DIExpression()), !dbg !22
+    call void @llvm.dbg.value(metadata i32 %arg2, metadata !19, metadata !DIExpression()), !dbg !22
+    call void @llvm.dbg.value(metadata i32 %arg3, metadata !20, metadata !DIExpression()), !dbg !22
+    store i32 %arg3, i32* %arg3.addr, align 4
+    %0 = bitcast i32* %a to i8*, !dbg !22
+    call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !22
+    %add = add nsw i32 %arg1, 2, !dbg !22
+    %sub = add nsw i32 %arg2, -4, !dbg !22
+    call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
+    %call = call arm_aapcscc i32 @func2(i32 %add, i32 %sub, i32* nonnull %arg3.addr), !dbg !22
+    call void @llvm.dbg.value(metadata i32 %call, metadata !21, metadata !DIExpression()), !dbg !22
+    store i32 %call, i32* %a, align 4, !dbg !22
+    %1 = load i32, i32* %arg3.addr, align 4, !dbg !22
+    call void @llvm.dbg.value(metadata i32 %1, metadata !20, metadata !DIExpression()), !dbg !22
+    %sub1 = add nsw i32 %1, -16, !dbg !22
+    %add2 = add nsw i32 %arg1, 8, !dbg !22
+    call void @llvm.dbg.value(metadata i32* %a, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !22
+    %call3 = call arm_aapcscc i32 @func2(i32 %sub1, i32 %add2, i32* nonnull %a), !dbg !22
+    %2 = load i32, i32* %a, align 4, !dbg !22
+    call void @llvm.dbg.value(metadata i32 %2, metadata !21, metadata !DIExpression()), !dbg !22
+    %add4 = add nsw i32 %2, %call3, !dbg !22
+    call void @llvm.dbg.value(metadata i32 %add4, metadata !21, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !22
+    call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !22
+    ret i32 %add4, !dbg !22
+  }
+  
+  ; Function Attrs: argmemonly nounwind willreturn
+  declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+  
+  declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32, i32, i32*) local_unnamed_addr
+  
+  ; Function Attrs: argmemonly nounwind willreturn
+  declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+  
+  ; Function Attrs: nounwind readnone speculatable willreturn
+  declare void @llvm.dbg.value(metadata, metadata, metadata)
+  
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**)
+  
+  attributes #0 = { "frame-pointer"="all"}
+  
+  !llvm.dbg.cu = !{!0}
+  !llvm.module.flags = !{!9, !10, !11, !12}
+  !llvm.ident = !{!13}
+  
+  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, nameTableKind: None)
+  !1 = !DIFile(filename: "dbgcall-site-interpretation.c", directory: "/")
+  !2 = !{}
+  !3 = !{!4}
+  !4 = !DISubprogram(name: "func2", scope: !1, file: !1, line: 8, type: !5, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
+  !5 = !DISubroutineType(types: !6)
+  !6 = !{!7, !7, !7, !8}
+  !7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !8 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 32)
+  !9 = !{i32 2, !"Dwarf Version", i32 4}
+  !10 = !{i32 2, !"Debug Info Version", i32 3}
+  !11 = !{i32 1, !"wchar_size", i32 4}
+  !12 = !{i32 1, !"min_enum_size", i32 4}
+  !13 = !{!"clang version 10.0.0"}
+  !14 = distinct !DISubprogram(name: "func1", scope: !1, file: !1, line: 9, type: !15, scopeLine: 9, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !17)
+  !15 = !DISubroutineType(types: !16)
+  !16 = !{!7, !7, !7, !7}
+  !17 = !{!18, !19, !20, !21}
+  !18 = !DILocalVariable(name: "arg1", arg: 1, scope: !14, file: !1, line: 9, type: !7, flags: DIFlagArgumentNotModified)
+  !19 = !DILocalVariable(name: "arg2", arg: 2, scope: !14, file: !1, line: 9, type: !7, flags: DIFlagArgumentNotModified)
+  !20 = !DILocalVariable(name: "arg3", arg: 3, scope: !14, file: !1, line: 9, type: !7)
+  !21 = !DILocalVariable(name: "a", scope: !14, file: !1, line: 10, type: !7)
+  !22 = !DILocation(line: 0, scope: !14)
+...
+---
+name:            func1
+alignment:       4
+callSites:
+  - { bb: 0, offset: 22, fwdArgRegs: 
+      - { arg: 0, reg: '$r0' }
+      - { arg: 1, reg: '$r1' }
+      - { arg: 2, reg: '$r2' } }
+  - { bb: 0, offset: 32, fwdArgRegs: 
+      - { arg: 0, reg: '$r0' }
+      - { arg: 1, reg: '$r1' }
+      - { arg: 2, reg: '$r2' } }
+body:             |
+  bb.0.entry:
+    liveins: $r0, $r1, $r2, $r4, $r5, $r10, $lr
+  
+    DBG_VALUE $r0, $noreg, !18, !DIExpression(), debug-location !22
+    DBG_VALUE $r1, $noreg, !19, !DIExpression(), debug-location !22
+    DBG_VALUE $r1, $noreg, !19, !DIExpression(), debug-location !22
+    DBG_VALUE $r2, $noreg, !20, !DIExpression(), debug-location !22
+    DBG_VALUE $r2, $noreg, !20, !DIExpression(), debug-location !22
+    $sp = frame-setup STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r10, $r11, killed $lr
+    frame-setup CFI_INSTRUCTION def_cfa_offset 16
+    frame-setup CFI_INSTRUCTION offset $lr, -4
+    frame-setup CFI_INSTRUCTION offset $r11, -8
+    frame-setup CFI_INSTRUCTION offset $r10, -12
+    frame-setup CFI_INSTRUCTION offset $r4, -16
+    $r11 = frame-setup ADDri $sp, 8, 14, $noreg, $noreg
+    frame-setup CFI_INSTRUCTION def_cfa $r11, 8
+    $sp = frame-setup SUBri $sp, 8, 14, $noreg, $noreg
+    $r4 = MOVr $r0, 14, $noreg, $noreg
+    DBG_VALUE $r4, $noreg, !18, !DIExpression(), debug-location !22
+    STRi12 killed renamable $r2, $sp, 4, 14, $noreg :: (store 4 into %ir.arg3.addr)
+    DBG_VALUE $sp, $noreg, !20, !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref), debug-location !22
+    renamable $r0 = nsw ADDri killed $r0, 2, 14, $noreg, $noreg, debug-location !22
+    renamable $r1 = nsw SUBri renamable $r4, 4, 14, $noreg, $noreg, debug-location !22
+    DBG_VALUE $r1, $noreg, !19, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !22
+    renamable $r2 = ADDri $sp, 4, 14, $noreg, $noreg
+    BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $sp, implicit-def $r0, debug-location !22
+    DBG_VALUE $r0, $noreg, !21, !DIExpression(), debug-location !22
+    STRi12 killed renamable $r0, $sp, 0, 14, $noreg, debug-location !22 :: (store 4 into %ir.a)
+    renamable $r0 = LDRi12 $sp, 4, 14, $noreg, debug-location !22 :: (dereferenceable load 4 from %ir.arg3.addr)
+    DBG_VALUE $sp, $noreg, !21, !DIExpression(DW_OP_deref), debug-location !22
+    DBG_VALUE $r0, $noreg, !20, !DIExpression(), debug-location !22
+    renamable $r1 = nsw ADDri killed renamable $r4, 8, 14, $noreg, $noreg, debug-location !22
+    $r5 = MOVr $sp, 14, $noreg, $noreg
+    renamable $r2 = LDRi12 killed $r5, 16, 14, $noreg
+    renamable $r0 = nsw SUBri killed renamable $r0, 16, 14, $noreg, $noreg, debug-location !22
+    BL @func2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $sp, implicit-def $r0, debug-location !22
+    renamable $r1 = LDRi12 $sp, 0, 14, $noreg, debug-location !22 :: (dereferenceable load 4 from %ir.a)
+    DBG_VALUE $r1, $noreg, !21, !DIExpression(), debug-location !22
+    renamable $r0 = nsw ADDrr killed renamable $r1, killed renamable $r0, 14, $noreg, $noreg, debug-location !22
+    DBG_VALUE $r0, $noreg, !21, !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value), debug-location !22
+    $sp = SUBri $r11, 8, 14, $noreg, $noreg, debug-location !22
+    $sp = LDMIA_UPD $sp, 14, $noreg, def $r4, def $r10, def $r11, def $lr, debug-location !22
+    DBG_VALUE $r0, $noreg, !18, !DIExpression(DW_OP_LLVM_entry_value, 1), debug-location !22
+    BX_RET 14, $noreg, implicit killed $r0, debug-location !22
+
+...


        


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