[PATCH] D68121: [X86] Model MXCSR for all SSE instructions

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 30 15:10:33 PDT 2019


This revision was automatically updated to reflect the committed changes.
Closed by commit rG8f48ba993ba3: [X86] Model MXCSR for all SSE instructions (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68121/new/

https://reviews.llvm.org/D68121

Files:
  llvm/lib/Target/X86/X86InstrFormats.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/test/CodeGen/MIR/X86/constant-pool.mir
  llvm/test/CodeGen/MIR/X86/fastmath.mir
  llvm/test/CodeGen/MIR/X86/memory-operands.mir
  llvm/test/CodeGen/X86/evex-to-vex-compress.mir
  llvm/test/CodeGen/X86/ipra-reg-usage.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D68121.227184.patch
Type: text/x-patch
Size: 56274 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191030/50fee226/attachment.bin>


More information about the llvm-commits mailing list