[llvm] 94a4a2c - [X86][SSE] combineX86ShuffleChain - use resolveZeroablesFromTargetShuffle helper. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 30 11:33:58 PDT 2019
Author: Simon Pilgrim
Date: 2019-10-30T18:30:01Z
New Revision: 94a4a2c97f8187f4fb73f8e8460d4cb11feb470c
URL: https://github.com/llvm/llvm-project/commit/94a4a2c97f8187f4fb73f8e8460d4cb11feb470c
DIFF: https://github.com/llvm/llvm-project/commit/94a4a2c97f8187f4fb73f8e8460d4cb11feb470c.diff
LOG: [X86][SSE] combineX86ShuffleChain - use resolveZeroablesFromTargetShuffle helper. NFCI.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index ccb8e8aa76b3..d9e38b18d86c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -32414,10 +32414,9 @@ static SDValue combineX86ShuffleChain(ArrayRef<SDValue> Inputs, SDValue Root,
(!MaskVT.is256BitVector() || Subtarget.hasAVX2());
// Determine zeroable mask elements.
- APInt Zeroable(NumMaskElts, 0);
- for (unsigned i = 0; i != NumMaskElts; ++i)
- if (isUndefOrZero(Mask[i]))
- Zeroable.setBit(i);
+ APInt KnownUndef, KnownZero;
+ resolveZeroablesFromTargetShuffle(Mask, KnownUndef, KnownZero);
+ APInt Zeroable = KnownUndef | KnownZero;
if (UnaryShuffle) {
// If we are shuffling a X86ISD::VZEXT_LOAD then we can use the load
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