[PATCH] D69609: [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (Baseline)
Joan LLuch via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 30 09:12:02 PDT 2019
joanlluch marked an inline comment as done.
joanlluch added inline comments.
================
Comment at: llvm/test/CodeGen/MSP430/shift-amount-threshold.ll:147
+; select C, 16, 0 -> shl C, 4
+define i16 @testSiymplifySelectCC_1(i16 %a, i16 %b) {
+; CHECK-LABEL: testSiymplifySelectCC_1:
----------------
spatel wrote:
> Test name got garbled.
Hi @spatel, I'm not English native, don't know what "garbled" means in this context. Please can you elaborate?. Is there something I need to do?.
I changed the name of this test case compared with my previous commit to match the LLVM function that is responsible for the transformation. Thanks
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69609/new/
https://reviews.llvm.org/D69609
More information about the llvm-commits
mailing list