[PATCH] D66576: [Regalloc][WIP] Increase CSR cost in RegAllocGreedy to favour splitting/spill over CSR first use

[Zhang Kang via Phabricator via llvm-commits]

ZhangKang updated this revision to Diff 226848.
ZhangKang marked an inline comment as done.
ZhangKang added a comment.

Update the test cases using the tool `update_llc_test_checks.py`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66576/new/

https://reviews.llvm.org/D66576

Files:
  llvm/lib/CodeGen/RegAllocGreedy.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.h
  llvm/lib/Target/PowerPC/PPCRegisterInfo.h
  llvm/lib/Target/X86/X86RegisterInfo.h
  llvm/test/CodeGen/AArch64/cgp-usubo.ll
  llvm/test/CodeGen/AArch64/csr-split.ll
  llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
  llvm/test/CodeGen/PowerPC/csr-split.ll
  llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
  llvm/test/CodeGen/PowerPC/tail-dup-layout.ll
  llvm/test/CodeGen/X86/atom-fixup-lea2.ll
  llvm/test/CodeGen/X86/block-placement.ll
  llvm/test/CodeGen/X86/bmi.ll
  llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
  llvm/test/CodeGen/X86/cgp-usubo.ll
  llvm/test/CodeGen/X86/csr-split.ll
  llvm/test/CodeGen/X86/fp128-cast.ll
  llvm/test/CodeGen/X86/peep-test-4.ll
  llvm/test/CodeGen/X86/ragreedy-bug.ll
  llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
  llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
  llvm/test/CodeGen/X86/sjlj-eh.ll
  llvm/test/CodeGen/X86/speculative-load-hardening.ll
  llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
  llvm/test/CodeGen/X86/tail-opts.ll
  llvm/test/CodeGen/X86/x86-shrink-wrapping.ll

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