[llvm] d6a7da8 - Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)
Sander de Smalen via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 29 09:14:16 PDT 2019
Author: Sander de Smalen
Date: 2019-10-29T16:13:07Z
New Revision: d6a7da80aae62474c15cad83d361830ffc4e2566
URL: https://github.com/llvm/llvm-project/commit/d6a7da80aae62474c15cad83d361830ffc4e2566
DIFF: https://github.com/llvm/llvm-project/commit/d6a7da80aae62474c15cad83d361830ffc4e2566.diff
LOG: Reland [AArch64][DebugInfo] Do not recompute CalleeSavedStackSize (Take 2)
llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir failed with
EXPENSIVE_CHECKS enabled, causing the patch to be reverted in
rG2c496bb5309c972d59b11f05aee4782ddc087e71.
This patch relands the patch with a proper fix to the
live-debug-values-reg-copy.mir tests, by ensuring the MIR encodes the
callee-saves correctly so that the CalleeSaved info is taken from MIR
directly, rather than letting it be recalculated by the PEI pass. I've
done this by running `llc -stop-before=prologepilog` on the LLVM
IR as captured in the test files, adding the extra MOV instructions
that were manually added in the original test file, then running `llc
-run-pass=prologepilog` and finally re-added the comments for the MOV
instructions.
Added:
llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir
Modified:
llvm/include/llvm/CodeGen/TargetFrameLowering.h
llvm/lib/CodeGen/LiveDebugValues.cpp
llvm/lib/CodeGen/RegUsageInfoCollector.cpp
llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
llvm/lib/Target/ARM/ARMFrameLowering.cpp
llvm/lib/Target/ARM/ARMFrameLowering.h
llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
index 72edb27964c4..2100a64c8f54 100644
--- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
@@ -282,6 +282,11 @@ class TargetFrameLowering {
return getFrameIndexReference(MF, FI, FrameReg);
}
+ /// Returns the callee-saved registers as computed by determineCalleeSaves
+ /// in the BitVector \p SavedRegs.
+ virtual void getCalleeSaves(const MachineFunction &MF,
+ BitVector &SavedRegs) const;
+
/// This method determines which of the registers reported by
/// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
/// The default implementation checks populates the \p SavedRegs bitset with
@@ -289,6 +294,9 @@ class TargetFrameLowering {
/// this function to save additional registers.
/// This method also sets up the register scavenger ensuring there is a free
/// register or a frameindex available.
+ /// This method should not be called by any passes outside of PEI, because
+ /// it may change state passed in by \p MF and \p RS. The preferred
+ /// interface outside PEI is getCalleeSaves.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const;
diff --git a/llvm/lib/CodeGen/LiveDebugValues.cpp b/llvm/lib/CodeGen/LiveDebugValues.cpp
index ea965780f307..b15c594a4545 100644
--- a/llvm/lib/CodeGen/LiveDebugValues.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues.cpp
@@ -1432,8 +1432,7 @@ bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
TRI = MF.getSubtarget().getRegisterInfo();
TII = MF.getSubtarget().getInstrInfo();
TFI = MF.getSubtarget().getFrameLowering();
- TFI->determineCalleeSaves(MF, CalleeSavedRegs,
- std::make_unique<RegScavenger>().get());
+ TFI->getCalleeSaves(MF, CalleeSavedRegs);
LS.initialize(MF);
bool Changed = ExtendRanges(MF);
diff --git a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
index 757ff0e44953..5a79ac44dcf4 100644
--- a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
+++ b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
@@ -56,7 +56,7 @@ class RegUsageInfoCollector : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override;
- // Call determineCalleeSaves and then also set the bits for subregs and
+ // Call getCalleeSaves and then also set the bits for subregs and
// fully saved superregs.
static void computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF);
@@ -199,7 +199,7 @@ computeCalleeSavedRegs(BitVector &SavedRegs, MachineFunction &MF) {
// Target will return the set of registers that it saves/restores as needed.
SavedRegs.clear();
- TFI.determineCalleeSaves(MF, SavedRegs);
+ TFI.getCalleeSaves(MF, SavedRegs);
if (SavedRegs.none())
return;
diff --git a/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp b/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
index 9eeacc2584cb..bc59be890c97 100644
--- a/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
+++ b/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
@@ -60,6 +60,19 @@ bool TargetFrameLowering::needsFrameIndexResolution(
return MF.getFrameInfo().hasStackObjects();
}
+void TargetFrameLowering::getCalleeSaves(const MachineFunction &MF,
+ BitVector &CalleeSaves) const {
+ const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
+ CalleeSaves.resize(TRI.getNumRegs());
+
+ const MachineFrameInfo &MFI = MF.getFrameInfo();
+ if (!MFI.isCalleeSavedInfoValid())
+ return;
+
+ for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
+ CalleeSaves.set(Info.getReg());
+}
+
void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
BitVector &SavedRegs,
RegScavenger *RS) const {
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 68e1e6a30224..042d8fdcc51d 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -1588,7 +1588,8 @@ static StackOffset getFPOffset(const MachineFunction &MF, int ObjectOffset) {
bool IsWin64 =
Subtarget.isCallingConvWin64(MF.getFunction().getCallingConv());
unsigned FixedObject = IsWin64 ? alignTo(AFI->getVarArgsGPRSize(), 16) : 0;
- unsigned FPAdjust = isTargetDarwin(MF) ? 16 : AFI->getCalleeSavedStackSize();
+ unsigned FPAdjust = isTargetDarwin(MF)
+ ? 16 : AFI->getCalleeSavedStackSize(MF.getFrameInfo());
return {ObjectOffset + FixedObject + FPAdjust, MVT::i8};
}
@@ -1630,7 +1631,7 @@ StackOffset AArch64FrameLowering::resolveFrameOffsetReference(
int FPOffset = getFPOffset(MF, ObjectOffset).getBytes();
int Offset = getStackOffset(MF, ObjectOffset).getBytes();
bool isCSR =
- !isFixed && ObjectOffset >= -((int)AFI->getCalleeSavedStackSize());
+ !isFixed && ObjectOffset >= -((int)AFI->getCalleeSavedStackSize(MFI));
const StackOffset &SVEStackSize = getSVEStackSize(MF);
@@ -2304,6 +2305,10 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
<< EstimatedStackSize + AlignedCSStackSize
<< " bytes.\n");
+ assert((!MFI.isCalleeSavedInfoValid() ||
+ AFI->getCalleeSavedStackSize() == AlignedCSStackSize) &&
+ "Should not invalidate callee saved info");
+
// Round up to register pair alignment to avoid additional SP adjustment
// instructions.
AFI->setCalleeSavedStackSize(AlignedCSStackSize);
diff --git a/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h b/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
index 0009fb7b5520..32661860934a 100644
--- a/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h
@@ -55,6 +55,7 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
/// Amount of stack frame size used for saving callee-saved registers.
unsigned CalleeSavedStackSize;
+ bool HasCalleeSavedStackSize = false;
/// Number of TLS accesses using the special (combinable)
/// _TLS_MODULE_BASE_ symbol.
@@ -167,8 +168,55 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
void setLocalStackSize(unsigned Size) { LocalStackSize = Size; }
unsigned getLocalStackSize() const { return LocalStackSize; }
- void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
- unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
+ void setCalleeSavedStackSize(unsigned Size) {
+ CalleeSavedStackSize = Size;
+ HasCalleeSavedStackSize = true;
+ }
+
+ // When CalleeSavedStackSize has not been set (for example when
+ // some MachineIR pass is run in isolation), then recalculate
+ // the CalleeSavedStackSize directly from the CalleeSavedInfo.
+ // Note: This information can only be recalculated after PEI
+ // has assigned offsets to the callee save objects.
+ unsigned getCalleeSavedStackSize(const MachineFrameInfo &MFI) const {
+ bool ValidateCalleeSavedStackSize = false;
+
+#ifndef NDEBUG
+ // Make sure the calculated size derived from the CalleeSavedInfo
+ // equals the cached size that was calculated elsewhere (e.g. in
+ // determineCalleeSaves).
+ ValidateCalleeSavedStackSize = HasCalleeSavedStackSize;
+#endif
+
+ if (!HasCalleeSavedStackSize || ValidateCalleeSavedStackSize) {
+ assert(MFI.isCalleeSavedInfoValid() && "CalleeSavedInfo not calculated");
+ if (MFI.getCalleeSavedInfo().empty())
+ return 0;
+
+ int64_t MinOffset = std::numeric_limits<int64_t>::max();
+ int64_t MaxOffset = std::numeric_limits<int64_t>::min();
+ for (const auto &Info : MFI.getCalleeSavedInfo()) {
+ int FrameIdx = Info.getFrameIdx();
+ int64_t Offset = MFI.getObjectOffset(FrameIdx);
+ int64_t ObjSize = MFI.getObjectSize(FrameIdx);
+ MinOffset = std::min<int64_t>(Offset, MinOffset);
+ MaxOffset = std::max<int64_t>(Offset + ObjSize, MaxOffset);
+ }
+
+ unsigned Size = alignTo(MaxOffset - MinOffset, 16);
+ assert((!HasCalleeSavedStackSize || getCalleeSavedStackSize() == Size) &&
+ "Invalid size calculated for callee saves");
+ return Size;
+ }
+
+ return getCalleeSavedStackSize();
+ }
+
+ unsigned getCalleeSavedStackSize() const {
+ assert(HasCalleeSavedStackSize &&
+ "CalleeSavedStackSize has not been calculated");
+ return CalleeSavedStackSize;
+ }
void incNumLocalDynamicTLSAccesses() { ++NumLocalDynamicTLSAccesses; }
unsigned getNumLocalDynamicTLSAccesses() const {
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 01ae93086dcb..5428bd6c94b3 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -2128,10 +2128,16 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
AFI->setLRIsSpilledForFarJump(true);
}
AFI->setLRIsSpilled(SavedRegs.test(ARM::LR));
+}
+
+void ARMFrameLowering::getCalleeSaves(const MachineFunction &MF,
+ BitVector &SavedRegs) const {
+ TargetFrameLowering::getCalleeSaves(MF, SavedRegs);
// If we have the "returned" parameter attribute which guarantees that we
// return the value which was passed in r0 unmodified (e.g. C++ 'structors),
// record that fact for IPRA.
+ const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
if (AFI->getPreservesR0())
SavedRegs.set(ARM::R0);
}
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.h b/llvm/lib/Target/ARM/ARMFrameLowering.h
index 6d8aee597945..0462b01af707 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.h
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.h
@@ -53,6 +53,8 @@ class ARMFrameLowering : public TargetFrameLowering {
int ResolveFrameIndexReference(const MachineFunction &MF, int FI,
unsigned &FrameReg, int SPAdj) const;
+ void getCalleeSaves(const MachineFunction &MF,
+ BitVector &SavedRegs) const override;
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS) const override;
diff --git a/llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir b/llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir
new file mode 100644
index 000000000000..231de4e18966
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/wrong-callee-save-size-after-livedebugvariables.mir
@@ -0,0 +1,92 @@
+# RUN: llc -start-before=prologepilog -filetype=obj -o %t %s
+# RUN: llvm-dwarfdump --name=obj1 %t | FileCheck %s --check-prefix=CHECKDWARF1
+# RUN: llvm-dwarfdump --name=obj2 %t | FileCheck %s --check-prefix=CHECKDWARF2
+# RUN: llvm-objdump --disassemble %t | FileCheck %s --check-prefix=CHECKASM
+#
+# Test that the location for obj1 and obj2 in the debug information is
+# the same as the location used by load instructions.
+#
+# CHECKDWARF1: DW_AT_location (DW_OP_fbreg -1)
+# CHECKDWARF2: DW_AT_location (DW_OP_fbreg -2)
+# CHECKASM: ldurb w0, [x29, #-1]
+# CHECKASM: ldurb w1, [x29, #-2]
+--- |
+ ; ModuleID = 'wrong-callee-save-size-after-livedebugvariables.c'
+ source_filename = "wrong-callee-save-size-after-livedebugvariables.c"
+ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+ target triple = "aarch64-unknown-linux-gnu"
+
+ ; Function Attrs: noinline nounwind optnone
+ define dso_local i8 @foo() #0 !dbg !7 {
+ entry:
+ %obj1 = alloca i8, align 1
+ %obj2 = alloca i8, align 1
+ %obj3 = alloca [238 x i8], align 1
+ ret i8 undef, !dbg !24
+ }
+
+ declare dso_local i8 @bar(i8, i8, i8*) #0
+
+ attributes #0 = { noinline nounwind optnone "frame-pointer"="all" }
+
+ !llvm.dbg.cu = !{!0}
+ !llvm.module.flags = !{!3, !4, !5}
+ !llvm.ident = !{!6}
+
+ !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, nameTableKind: None)
+ !1 = !DIFile(filename: "wrong-callee-save-size-after-livedebugvariables.c", directory: "")
+ !2 = !{}
+ !3 = !{i32 2, !"Dwarf Version", i32 4}
+ !4 = !{i32 2, !"Debug Info Version", i32 3}
+ !5 = !{i32 1, !"wchar_size", i32 4}
+ !6 = !{!"clang version 10.0.0"}
+ !7 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 3, type: !8, scopeLine: 3, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
+ !8 = !DISubroutineType(types: !9)
+ !9 = !{!10}
+ !10 = !DIBasicType(name: "char", size: 8, encoding: DW_ATE_unsigned_char)
+ !11 = !DILocalVariable(name: "obj1", scope: !7, file: !1, line: 4, type: !10)
+ !12 = !DILocation(line: 4, column: 8, scope: !7)
+ !13 = !DILocalVariable(name: "obj2", scope: !7, file: !1, line: 5, type: !10)
+ !14 = !DILocation(line: 5, column: 8, scope: !7)
+ !15 = !DILocalVariable(name: "obj3", scope: !7, file: !1, line: 6, type: !16)
+ !16 = !DICompositeType(tag: DW_TAG_array_type, baseType: !10, size: 1904, elements: !17)
+ !17 = !{!18}
+ !18 = !DISubrange(count: 238)
+ !19 = !DILocation(line: 6, column: 8, scope: !7)
+ !20 = !DILocation(line: 7, column: 14, scope: !7)
+ !21 = !DILocation(line: 7, column: 20, scope: !7)
+ !22 = !DILocation(line: 7, column: 27, scope: !7)
+ !23 = !DILocation(line: 7, column: 10, scope: !7)
+ !24 = !DILocation(line: 7, column: 3, scope: !7)
+
+...
+---
+name: foo
+tracksRegLiveness: true
+frameInfo:
+ hasCalls: true
+fixedStack: []
+stack:
+ - { id: 0, name: obj1, type: default, offset: 0, size: 1, alignment: 1,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ local-offset: -1, debug-info-variable: '!11', debug-info-expression: '!DIExpression()',
+ debug-info-location: '!12' }
+ - { id: 1, name: obj2, type: default, offset: 0, size: 1, alignment: 1,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ local-offset: -2, debug-info-variable: '!13', debug-info-expression: '!DIExpression()',
+ debug-info-location: '!14' }
+ - { id: 2, name: obj3, type: default, offset: 0, size: 238, alignment: 1,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+ local-offset: -240, debug-info-variable: '!15', debug-info-expression: '!DIExpression()',
+ debug-info-location: '!19' }
+body: |
+ bb.1.entry:
+ renamable $x2 = ADDXri %stack.2.obj3, 0, 0
+ renamable $w0 = LDRBBui %stack.0.obj1, 0, debug-location !20 :: (load 1 from %ir.obj1)
+ renamable $w1 = LDRBBui %stack.1.obj2, 0, debug-location !21 :: (load 1 from %ir.obj2)
+ ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp, debug-location !23
+ BL @bar, csr_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit killed $w0, implicit killed $w1, implicit killed $x2, implicit-def $w0, debug-location !23
+ ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp, debug-location !23
+ RET_ReallyLR implicit killed $w0, debug-location !24
+
+...
diff --git a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
index 52df7ae9751b..c58bf1180dbc 100644
--- a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
@@ -106,32 +106,41 @@ frameInfo:
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
- stackSize: 32
+ stackSize: 48
offsetAdjustment: 0
maxAlignment: 8
adjustsStack: true
hasCalls: true
stackProtector: ''
maxCallFrameSize: 0
+ cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
+ localFrameSize: 0
savePoint: ''
restorePoint: ''
-fixedStack:
+fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: default, callee-saved-register: '$d25_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d26_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: default, callee-saved-register: '$d24_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d25_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: default, callee-saved-register: '$ra_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d24_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
+ stack-id: default, callee-saved-register: '$ra_64', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
+ stack-id: default, callee-saved-register: '$s1_64', callee-saved-restored: true,
+ debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+ - { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
stack-id: default, callee-saved-register: '$s0_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+callSites: []
constants:
- id: 0
value: 'double 1.012310e+01'
@@ -148,21 +157,28 @@ constants:
body: |
bb.0.entry:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ liveins: $f12, $a1_64, $s1_64, $f26, $d26_64, $d25_64, $d24_64, $ra_64, $s1_64, $s0_64
- $sp_64 = DADDiu $sp_64, -32
- CFI_INSTRUCTION def_cfa_offset 32
- SDC164 killed $d25_64, $sp_64, 24 :: (store 8 into %stack.0)
- SDC164 killed $d24_64, $sp_64, 16 :: (store 8 into %stack.1)
- SD killed $ra_64, $sp_64, 8 :: (store 8 into %stack.2)
- SD killed $s0_64, $sp_64, 0 :: (store 8 into %stack.3)
- CFI_INSTRUCTION offset $d26_64, -8
- CFI_INSTRUCTION offset $d25_64, -4
- CFI_INSTRUCTION offset $d25_64, -16
- CFI_INSTRUCTION offset $d24_64, -12
- CFI_INSTRUCTION offset $ra_64, -24
- CFI_INSTRUCTION offset $s0_64, -32
DBG_VALUE $f12, $noreg, !14, !DIExpression(), debug-location !19
DBG_VALUE $a1_64, $noreg, !15, !DIExpression(), debug-location !19
+ $sp_64 = DADDiu $sp_64, -48
+ CFI_INSTRUCTION def_cfa_offset 48
+ SDC164 killed $d26_64, $sp_64, 40 :: (store 8 into %stack.0)
+ SDC164 killed $d25_64, $sp_64, 32 :: (store 8 into %stack.1)
+ SDC164 killed $d24_64, $sp_64, 24 :: (store 8 into %stack.2)
+ SD killed $ra_64, $sp_64, 16 :: (store 8 into %stack.3)
+ SD killed $s1_64, $sp_64, 8 :: (store 8 into %stack.4)
+ SD killed $s0_64, $sp_64, 0 :: (store 8 into %stack.5)
+ CFI_INSTRUCTION offset $d27_64, -8
+ CFI_INSTRUCTION offset $d26_64, -4
+ CFI_INSTRUCTION offset $d26_64, -16
+ CFI_INSTRUCTION offset $d25_64, -12
+ CFI_INSTRUCTION offset $d25_64, -24
+ CFI_INSTRUCTION offset $d24_64, -20
+ CFI_INSTRUCTION offset $ra_64, -32
+ CFI_INSTRUCTION offset $s1_64, -40
+ CFI_INSTRUCTION offset $s0_64, -48
+ renamable $s0_64 = COPY $a1_64
DBG_VALUE $s0, $noreg, !15, !DIExpression(), debug-location !19
DBG_VALUE $s0_64, $noreg, !15, !DIExpression(), debug-location !19
DBG_VALUE $f12, $noreg, !14, !DIExpression(), debug-location !19
@@ -172,23 +188,19 @@ body: |
renamable $at_64 = DSLL killed renamable $at_64, 16
renamable $at_64 = DADDiu killed renamable $at_64, target-flags(mips-abs-hi) %const.0
renamable $at_64 = DSLL killed renamable $at_64, 16
- renamable $d1_64 = LDC164 killed renamable $at_64, target-flags(mips-abs-lo) %const.0, debug-location !19 :: (load 8 from constant-pool)
+ renamable $d1_64 = LDC164 killed renamable $at_64, target-flags(mips-abs-lo) %const.0 :: (load 8 from constant-pool)
FCMP_D64 killed renamable $d0_64, killed renamable $d1_64, 7, implicit-def $fcc0, debug-location !19
- BC1T killed $fcc0, %bb.2, implicit-def $at, debug-location !19 {
- $s0_64 = OR64 $a1_64, $zero_64
- }
+ BC1T killed $fcc0, %bb.2, implicit-def dead $at, debug-location !19
+ J %bb.1, implicit-def dead $at, debug-location !19
bb.1.if.then:
successors: %bb.3(0x80000000)
+ liveins: $f12, $s0_64
- JAL @externFunc, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def dead $f0, debug-location !19 {
- NOP debug-location !19
- }
- JAL @externFunc3, csr_n64, implicit-def dead $ra, implicit $a0_64, implicit-def $sp, implicit-def $v0, debug-location !19 {
- renamable $a0_64 = SLL64_32 renamable $s0, implicit $s0_64, debug-location !19
- }
- $f0 = MTC1 killed $v0, debug-location !19
- $f0 = CVT_S_W killed $f0, debug-location !19
+ JAL @externFunc, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def dead $f0, debug-location !19
+ renamable $a0_64 = SLL64_32 renamable $s0, implicit $s0_64, debug-location !19
+ JAL @externFunc3, csr_n64, implicit-def dead $ra, implicit $a0_64, implicit-def $sp, implicit-def $v0, debug-location !19
+ renamable $f0 = PseudoCVT_S_W killed renamable $v0, debug-location !19
; This instruction is inserted additionally in order to test moving from one register to another
$s1_64 = OR64 killed $s0_64, $zero_64, debug-location !19
renamable $at_64 = LUi64 target-flags(mips-highest) %const.2
@@ -196,46 +208,45 @@ body: |
renamable $at_64 = DSLL killed renamable $at_64, 16
renamable $at_64 = DADDiu killed renamable $at_64, target-flags(mips-abs-hi) %const.2
renamable $at_64 = DSLL killed renamable $at_64, 16
- renamable $f1 = LWC1 killed renamable $at_64, target-flags(mips-abs-lo) %const.2, debug-location !19 :: (load 4 from constant-pool)
- J %bb.3, implicit-def dead $at, debug-location !19 {
- renamable $f0 = FADD_S killed renamable $f0, killed renamable $f1, debug-location !19
- }
+ renamable $f1 = LWC1 killed renamable $at_64, target-flags(mips-abs-lo) %const.2 :: (load 4 from constant-pool)
+ renamable $f0 = FADD_S killed renamable $f0, killed renamable $f1, debug-location !19
+ J %bb.3, implicit-def dead $at, debug-location !19
bb.2.if.else:
successors: %bb.3(0x80000000)
+ liveins: $f12, $s0_64
renamable $at_64 = LUi64 target-flags(mips-highest) %const.1
renamable $at_64 = DADDiu killed renamable $at_64, target-flags(mips-higher) %const.1
renamable $at_64 = DSLL killed renamable $at_64, 16
renamable $at_64 = DADDiu killed renamable $at_64, target-flags(mips-abs-hi) %const.1
renamable $at_64 = DSLL killed renamable $at_64, 16
- renamable $f0 = LWC1 killed renamable $at_64, target-flags(mips-abs-lo) %const.1, debug-location !19 :: (load 4 from constant-pool)
+ renamable $f0 = LWC1 killed renamable $at_64, target-flags(mips-abs-lo) %const.1 :: (load 4 from constant-pool)
renamable $f24 = FADD_S killed renamable $f12, killed renamable $f0, debug-location !19
DBG_VALUE $f24, $noreg, !14, !DIExpression(), debug-location !19
- JAL @externFunc2, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def $f0, debug-location !19 {
- $f12 = FMOV_S $f24, debug-location !19
- }
- $f25 = FMOV_S $f0, debug-location !19
- JAL @externFunc4, csr_n64, implicit-def dead $ra, implicit $a0_64, implicit-def $sp, implicit-def $v0, debug-location !19 {
- renamable $a0_64 = SLL64_32 renamable $s0, implicit killed $s0_64, debug-location !19
- }
- $s0 = OR $v0, $zero, debug-location !19
- JAL @externFunc, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def dead $f0, debug-location !19 {
- $f12 = FMOV_S $f24, debug-location !19
- }
- $f0 = MTC1 killed $s0, debug-location !19
- $f0 = CVT_S_W killed $f0, debug-location !19
- renamable $f0 = FADD_S renamable $f25, killed renamable $f0, debug-location !19
+ $f12 = COPY renamable $f24, debug-location !19
+ JAL @externFunc2, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def $f0, debug-location !19
+ renamable $f25 = COPY $f0, debug-location !19
+ renamable $a0_64 = SLL64_32 renamable $s0, implicit killed $s0_64, debug-location !19
+ JAL @externFunc4, csr_n64, implicit-def dead $ra, implicit $a0_64, implicit-def $sp, implicit-def $v0, debug-location !19
+ renamable $s0 = COPY $v0, debug-location !19
+ $f12 = COPY renamable $f24, debug-location !19
+ JAL @externFunc, csr_n64, implicit-def dead $ra, implicit $f12, implicit-def $sp, implicit-def dead $f0, debug-location !19
+ renamable $f0 = PseudoCVT_S_W killed renamable $s0, debug-location !19
+ renamable $f0 = FADD_S killed renamable $f25, killed renamable $f0, debug-location !19
; This instruction is inserted additionally in order to test moving variable's value from one float register to another.
$f26 = FMOV_S killed $f24, debug-location !19
bb.3.if.end:
- $s0_64 = LD $sp_64, 0, debug-location !19 :: (load 8 from %stack.3)
- $ra_64 = LD $sp_64, 8, debug-location !19 :: (load 8 from %stack.2)
- $d24_64 = LDC164 $sp_64, 16, debug-location !19 :: (load 8 from %stack.1)
- $d25_64 = LDC164 $sp_64, 24, debug-location !19 :: (load 8 from %stack.0)
- PseudoReturn64 undef $ra_64, implicit $f0, debug-location !19 {
- $sp_64 = DADDiu $sp_64, 32
- }
+ liveins: $f0
+
+ $s0_64 = LD $sp_64, 0, debug-location !19 :: (load 8 from %stack.5)
+ $s1_64 = LD $sp_64, 8, debug-location !19 :: (load 8 from %stack.4)
+ $ra_64 = LD $sp_64, 16, debug-location !19 :: (load 8 from %stack.3)
+ $d24_64 = LDC164 $sp_64, 24, debug-location !19 :: (load 8 from %stack.2)
+ $d25_64 = LDC164 $sp_64, 32, debug-location !19 :: (load 8 from %stack.1)
+ $d26_64 = LDC164 $sp_64, 40, debug-location !19 :: (load 8 from %stack.0)
+ $sp_64 = DADDiu $sp_64, 48
+ RetRA implicit $f0, debug-location !19
...
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
index ba748b989c43..5bd2f94ef15d 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
@@ -113,8 +113,8 @@ frameInfo:
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
- stackSize: 24
- offsetAdjustment: 0
+ stackSize: 40
+ offsetAdjustment: -40
maxAlignment: 4
adjustsStack: true
hasCalls: true
@@ -126,65 +126,79 @@ frameInfo:
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
+ - { id: 0, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
+ - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
+ callee-saved-register: '$r12', callee-saved-restored: true }
+ - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$rbp', callee-saved-restored: true }
stack:
- - { id: 0, name: local1, type: default, offset: -28, size: 4, alignment: 4,
+ - { id: 0, name: local1, type: default, offset: -36, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
bb.0.entry:
successors: %bb.1(0x40000000), %bb.2(0x40000000)
- liveins: $edi, $rbp, $rbx
+ liveins: $edi, $rbp, $r12, $rbx
+ DBG_VALUE $edi, $noreg, !12, !DIExpression(), debug-location !15
frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
- frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 24
- frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
+ frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 32
- CFI_INSTRUCTION offset $rbx, -24
+ $rsp = frame-setup SUB64ri8 $rsp, 16, implicit-def dead $eflags
+ CFI_INSTRUCTION def_cfa_offset 48
+ CFI_INSTRUCTION offset $rbx, -32
+ CFI_INSTRUCTION offset $r12, -24
CFI_INSTRUCTION offset $rbp, -16
- DBG_VALUE $edi, $noreg, !12, !DIExpression(), debug-location !15
- $ebx = MOV32rr $edi, implicit-def $rbx
+ renamable $ebx = COPY $edi, implicit-def $rbx
DBG_VALUE $ebx, $noreg, !12, !DIExpression(), debug-location !15
- renamable $rdi = LEA64r $rsp, 1, $noreg, 4, $noreg
+ renamable $rdi = LEA64r $rsp, 1, $noreg, 12, $noreg
CALL64pcrel32 @init, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, debug-location !15
- renamable $edi = MOV32rm $rsp, 1, $noreg, 4, $noreg :: (dereferenceable load 4 from %ir.local1, !tbaa !20)
+ renamable $edi = MOV32rm $rsp, 1, $noreg, 12, $noreg :: (dereferenceable load 4 from %ir.local1, !tbaa !20)
renamable $edi = ADD32rr killed renamable $edi, renamable $ebx, implicit-def dead $eflags, debug-location !15
CALL64pcrel32 @coeficient, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !15
- $ebp = MOV32rr $eax, debug-location !15
- $edi = MOV32rr $ebx, debug-location !15
- CMP32ri8 renamable $ebp, 33, implicit-def $eflags, debug-location !15
+ renamable $ebp = COPY $eax, debug-location !15
+ CMP32ri8 $eax, 33, implicit-def $eflags, debug-location !15
JCC_1 %bb.2, 12, implicit killed $eflags, debug-location !15
+ JMP_1 %bb.1, debug-location !15
bb.1.if.then:
successors: %bb.3(0x80000000)
- liveins: $ebp, $edi
+ liveins: $ebp, $rbx
+ $edi = COPY renamable $ebx, debug-location !15
CALL64pcrel32 @externFunc, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !15
- JMP_1 %bb.3
+ renamable $eax = KILL $eax, implicit-def $rax, debug-location !15
+ renamable $eax = nsw ADD32rm renamable $eax, $rsp, 1, $noreg, 12, $noreg, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax, debug-location !15 :: (dereferenceable load 4 from %ir.local1, !tbaa !20)
+ JMP_1 %bb.3, debug-location !15
bb.2.if.else:
successors: %bb.3(0x80000000)
- liveins: $ebp, $edi
+ liveins: $ebp, $rbx
+ $edi = COPY renamable $ebx, debug-location !15
CALL64pcrel32 @externFunc2, csr_64, implicit $rsp, implicit $ssp, implicit $edi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax, debug-location !15
+ renamable $eax = KILL $eax, implicit-def $rax, debug-location !15
+ renamable $eax = nsw ADD32rm renamable $eax, $rsp, 1, $noreg, 12, $noreg, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax, debug-location !15 :: (dereferenceable load 4 from %ir.local1, !tbaa !20)
bb.3.if.end:
- liveins: $ebp, $ebx, $eax
+ liveins: $ebp, $rax, $rbx, $r12
; Instruction below is added in order to test moving variable's value from one register to another.
$r12d = MOV32rr killed $ebx, implicit-def $r12
- renamable $eax = KILL $eax, implicit-def $rax
- renamable $eax = ADD32rm renamable $eax, $rsp, 1, $noreg, 4, $noreg, implicit-def dead $eflags, implicit killed $rax, implicit-def $rax :: (dereferenceable load 4 from %ir.local1, !tbaa !20)
- renamable $eax = LEA64_32r killed renamable $rax, 4, killed renamable $r12, 0, $noreg, debug-location !15
- renamable $eax = IMUL32rr killed renamable $eax, killed renamable $ebp, implicit-def dead $eflags, debug-location !15
- $rsp = frame-destroy ADD64ri8 $rsp, 8, implicit-def dead $eflags, debug-location !15
+ renamable $eax = nsw LEA64_32r killed renamable $rax, 4, killed renamable $rbx, 0, $noreg, debug-location !15
+ renamable $eax = nsw IMUL32rr killed renamable $eax, killed renamable $ebp, implicit-def dead $eflags, debug-location !15
+ $rsp = frame-destroy ADD64ri8 $rsp, 16, implicit-def dead $eflags, debug-location !15
+ CFI_INSTRUCTION def_cfa_offset 32, debug-location !15
$rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15
+ CFI_INSTRUCTION def_cfa_offset 24, debug-location !15
+ $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15
+ CFI_INSTRUCTION def_cfa_offset 16, debug-location !15
$rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp, debug-location !15
- RETQ $eax, debug-location !15
+ CFI_INSTRUCTION def_cfa_offset 8, debug-location !15
+ RET 0, $eax, debug-location !15
...
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