[PATCH] D68476: [SVE][AArch64] Adding pattern matching for some SVE instructions.

[Graham Hunter via Phabricator via llvm-commits]

huntergr added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsAArch64.td:816
+//
+def int_aarch64_sve_recps: AdvSIMD_2VectorArg_Intrinsic;
+def int_aarch64_sve_rsqrts: AdvSIMD_2VectorArg_Intrinsic;
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One minor change I'd like to request is to do with the naming convention we have for these...

`int_aarch64_sve_frecps_x` and `int_aarch64_sve_frsqrts_x` would be the preferred names. Adding `f` to the start will match the instruction name, and the `_x` suffix is to indicate an unpredicated intrinsic.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68476/new/

https://reviews.llvm.org/D68476