[PATCH] D67046: [RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook

Sam Elliott via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 28 07:08:07 PDT 2019

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lenary accepted this revision.
lenary added a comment.
This revision is now accepted and ready to land.
Herald added a subscriber: sameer.abuasal.

LGTM. When you land it, do add a comment about how the `disjoint.ll` test works.


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  https://reviews.llvm.org/D67046/new/

https://reviews.llvm.org/D67046

Previous message: [PATCH] D67698: [RISCV] Remove RA from reserved register to use as callee saved register
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