[PATCH] D69530: [AArch64][SVE] Add remaining patterns and intrinsics for predicated integer arithmetic instructions
Danilo Carvalho Grael via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 13:29:50 PDT 2019
dancgr created this revision.
dancgr added reviewers: huntergr, rengolin, sdesmalen, amehsan.
Herald added subscribers: llvm-commits, psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.
Add pattern matching and intrinsics for the following SVE instructions:
- predicated orr, eor, and, bic
- predicated mul, smulh, umulh, sdiv, udiv, sdivr, udivr
- predicated smax, umax, smin, umin, sabd, uabd
Repository:
rL LLVM
https://reviews.llvm.org/D69530
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-int-arith-pred.ll
llvm/test/CodeGen/AArch64/sve-int-div-pred.ll
llvm/test/CodeGen/AArch64/sve-int-log-pred.ll
llvm/test/CodeGen/AArch64/sve-int-mul-pred.ll
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