[PATCH] D69457: [globalisel][docs] Rewrite the IRTranslator documentation

Mon Oct 28 12:51:47 PDT 2019

dsanders marked 5 inline comments as done.
dsanders added inline comments.

================
Comment at: llvm/docs/GlobalISel/IRTranslator.rst:69-70
+
 Aggregates are lowered to a single scalar vreg.
 This differs from SelectionDAG's multiple vregs via ``GetValueVTs``.

----------------
arsenm wrote:
> This is no longer accurate, and multiple registers are produced
I've strengthened the caution on this section. I've asked Aditya to look into updating this section but he's not going to be able to get to it until Friday at the earliest

================
Comment at: llvm/docs/GlobalISel/IRTranslator.rst:94
+spills and reloads in an -O0 pipeline, as these virtual registers can have long
+live ranges. This can be mitigated by running a localizer after the translator.
----------------
rovka wrote:
> Maybe a link to the in-tree Localizer pass?
Done. I've used a link that tracks master for this one since we're linking to the pass itself rather than any specific code. We should probably turn it into a proper documentation page at some point.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69457/new/

https://reviews.llvm.org/D69457