[PATCH] D69120: [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (2/2)
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 05:17:17 PDT 2019
spatel added inline comments.
================
Comment at: llvm/test/CodeGen/MSP430/shift-amount-threshold.ll:50
define i16 @testExtendSignBit(i16 %a) {
; CHECK-LABEL: testExtendSignBit:
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Do we have test coverage for each code diff?
It would be good to add a code comment for each test that describes the transform that we are trying to avoid.
For example, this one could copy the formula from the corresponding source code comment:
// sext i1 (setgt iN X, -1) --> sra (not X), (N - 1)
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69120/new/
https://reviews.llvm.org/D69120
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