[PATCH] D69483: [PowerPC]: Fix predicate handling with SPE
Kei Thomsen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 00:17:12 PDT 2019
kthomsen added a comment.
Justin,
last week, I found out, that there is a second place for this GT/LE modification needed. Therefore I moved the switch/case into a separate function.
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 2cb0387..b678656
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -3860,6 +3878,36 @@ static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
}
}
+// For SPE operations, the Result is stored in GT
+// Return the corresponding GT or LE code for this
+// Prior to this, the Compare must have been modified to EF?CMP?? in SelectCC
+static PPC::Predicate getPredicateForSetCCForSPE(ISD::CondCode CC) {
+ PPC::Predicate Opc = PPC::PRED_SPE;
+ switch(CC) {
+ case ISD::SETOEQ:
+ case ISD::SETEQ:
+ case ISD::SETOLT:
+ case ISD::SETLT:
+ case ISD::SETOGT:
+ case ISD::SETGT:
+ Opc = PPC::PRED_GT;
+ break;
+ case ISD::SETUNE:
+ case ISD::SETNE:
+ case ISD::SETULE:
+ case ISD::SETLE:
+ case ISD::SETUGE:
+ case ISD::SETGE:
+ Opc = PPC::PRED_LE;
+ break;
+ default:
+ printf("Undefined SPE Predicate for CC %u\n",CC);
+ break;
+ }
+ return Opc;
+}
+
+
/// getCRIdxForSetCC - Return the index of the condition register field
/// associated with the SetCC condition, and whether or not the field is
/// treated as inverted. That is, lt = 0; ge = 0 inverted.
@@ -4890,6 +4937,13 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
}
unsigned BROpc = getPredicateForSetCC(CC);
+ // Override BROpc if SPE with f64/f32 operation
+ // Watch out: N->getOperand(0).getValueType is not the same as N->getValueType(0)
+ if (PPCSubTarget->hasSPE()
+ && ( N->getOperand(0).getValueType() == MVT::f64
+ || N->getOperand(0).getValueType() == MVT::f32) ) {
+ BROpc = getPredicateForSetCCForSPE(CC);
+ }
unsigned SelectCCOp;
if (N->getValueType(0) == MVT::i32)
@@ -5048,6 +5102,12 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(4));
SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
+
+ if (PPCSubTarget->hasSPE() && N->getOperand(2).getValueType().isFloatingPoint()) {
+ // For SPE instructions, the result is in GT bit of the CR
+ PCC = getPredicateForSetCCForSPE(CC);
+ }
+
SDValue Ops[] = { getI32Imm(PCC, dl), CondCode,
N->getOperand(4), N->getOperand(0) };
CurDAG->SelectNodeTo(N, PPC::BCC, MVT::Other, Ops);
Not sure, if the naming of the function getPredicateForSetCCForSPE() is good. Maybe we need to rename this.
Best regards,
Kei
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69483/new/
https://reviews.llvm.org/D69483
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