[PATCH] D69365: [X86] Use 64-bit version of source register in LowerPATCHABLE_EVENT_CALL and LowerPATCHABLE_TYPED_EVENT_CALL

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D69365#1722730 <https://reviews.llvm.org/D69365#1722730>, @dberris wrote:

> LGTM -- thanks!
>
> Do you have any suggestions on how to achieve what the FIXME'ed areas are attempting to do?


Could we have an X86 specific pseudo that implicitly uses the registers we want here then emit the necessary copies from virtual regs to those physical registers during instruction selection. Then the register allocator will do all the work? But would make the sled size different.


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https://reviews.llvm.org/D69365