[PATCH] D69457: [globalisel][docs] Rewrite the IRTranslator documentation

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/docs/GlobalISel/IRTranslator.rst:69-70
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 Aggregates are lowered to a single scalar vreg.
 This differs from SelectionDAG's multiple vregs via ``GetValueVTs``.
 
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This is no longer accurate, and multiple registers are produced


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https://reviews.llvm.org/D69457