[PATCH] D67120: [PGO] Profile guided code size optimization (continued).
Hiroshi Yamauchi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 24 15:25:57 PDT 2019
yamauchi updated this revision to Diff 226346.
yamauchi added a comment.
Herald added a subscriber: sameer.abuasal.
Rebased.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67120/new/
https://reviews.llvm.org/D67120
Files:
llvm/include/llvm/Analysis/TargetTransformInfo.h
llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
llvm/include/llvm/CodeGen/AsmPrinter.h
llvm/include/llvm/CodeGen/BasicTTIImpl.h
llvm/include/llvm/CodeGen/ExecutionDomainFix.h
llvm/include/llvm/CodeGen/LiveRangeEdit.h
llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
llvm/include/llvm/CodeGen/MachineDominators.h
llvm/include/llvm/CodeGen/MachineLoopInfo.h
llvm/include/llvm/CodeGen/MachineSizeOpts.h
llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/include/llvm/CodeGen/SelectionDAGISel.h
llvm/include/llvm/CodeGen/SwitchLoweringUtils.h
llvm/include/llvm/CodeGen/TailDuplicator.h
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/include/llvm/Transforms/Utils/SizeOpts.h
llvm/lib/Analysis/InlineCost.cpp
llvm/lib/Analysis/TargetTransformInfo.cpp
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/lib/CodeGen/BranchFolding.cpp
llvm/lib/CodeGen/BranchFolding.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGenPrepare.cpp
llvm/lib/CodeGen/ExecutionDomainFix.cpp
llvm/lib/CodeGen/ExpandMemCmp.cpp
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/lib/CodeGen/IfConversion.cpp
llvm/lib/CodeGen/InlineSpiller.cpp
llvm/lib/CodeGen/LiveRangeEdit.cpp
llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
llvm/lib/CodeGen/MachineBlockPlacement.cpp
llvm/lib/CodeGen/MachineCSE.cpp
llvm/lib/CodeGen/MachineCombiner.cpp
llvm/lib/CodeGen/MachineDominators.cpp
llvm/lib/CodeGen/MachineLoopInfo.cpp
llvm/lib/CodeGen/MachineSizeOpts.cpp
llvm/lib/CodeGen/PeepholeOptimizer.cpp
llvm/lib/CodeGen/RegAllocBasic.cpp
llvm/lib/CodeGen/RegAllocGreedy.cpp
llvm/lib/CodeGen/RegAllocPBQP.cpp
llvm/lib/CodeGen/RegisterCoalescer.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/SplitKit.cpp
llvm/lib/CodeGen/SplitKit.h
llvm/lib/CodeGen/SwitchLoweringUtils.cpp
llvm/lib/CodeGen/TailDuplication.cpp
llvm/lib/CodeGen/TailDuplicator.cpp
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.h
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrInfo.h
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/lib/Target/SystemZ/SystemZInstrInfo.h
llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
llvm/lib/Target/X86/X86FastISel.cpp
llvm/lib/Target/X86/X86FixupBWInsts.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrInfo.h
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86OptimizeLEAs.cpp
llvm/lib/Target/X86/X86PadShortFunction.cpp
llvm/lib/Transforms/Utils/SizeOpts.cpp
llvm/test/CodeGen/AArch64/O0-pipeline.ll
llvm/test/CodeGen/AArch64/O3-pipeline.ll
llvm/test/CodeGen/AArch64/arm64-memset-to-bzero-pgso.ll
llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll
llvm/test/CodeGen/AArch64/max-jump-table.ll
llvm/test/CodeGen/ARM/O3-pipeline.ll
llvm/test/CodeGen/ARM/constantpool-align.ll
llvm/test/CodeGen/RISCV/tail-calls.ll
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/test/CodeGen/X86/O3-pipeline.ll
llvm/test/CodeGen/X86/atom-pad-short-functions.ll
llvm/test/CodeGen/X86/avx-cvt.ll
llvm/test/CodeGen/X86/avx512-mask-op.ll
llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
llvm/test/CodeGen/X86/cmov-into-branch.ll
llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
llvm/test/CodeGen/X86/fixup-lea.ll
llvm/test/CodeGen/X86/fold-load-unops.ll
llvm/test/CodeGen/X86/fshl.ll
llvm/test/CodeGen/X86/fshr.ll
llvm/test/CodeGen/X86/haddsub.ll
llvm/test/CodeGen/X86/immediate_merging.ll
llvm/test/CodeGen/X86/immediate_merging64.ll
llvm/test/CodeGen/X86/loop-blocks.ll
llvm/test/CodeGen/X86/materialize.ll
llvm/test/CodeGen/X86/memcmp-pgso.ll
llvm/test/CodeGen/X86/memcpy.ll
llvm/test/CodeGen/X86/powi.ll
llvm/test/CodeGen/X86/rounding-ops.ll
llvm/test/CodeGen/X86/shrink-compare-pgso.ll
llvm/test/CodeGen/X86/slow-incdec.ll
llvm/test/CodeGen/X86/splat-for-size.ll
llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
llvm/test/CodeGen/X86/sse41.ll
llvm/test/CodeGen/X86/store-zero-and-minus-one.ll
llvm/test/CodeGen/X86/switch-density.ll
llvm/test/CodeGen/X86/tail-opts.ll
llvm/test/CodeGen/X86/test-vs-bittest.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll
llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
llvm/unittests/CodeGen/CMakeLists.txt
llvm/unittests/CodeGen/MachineSizeOptsTest.cpp
llvm/unittests/Transforms/Utils/CMakeLists.txt
llvm/unittests/Transforms/Utils/SizeOptsTest.cpp
llvm/utils/TableGen/GlobalISelEmitter.cpp
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