[PATCH] D69385: [RISCV] Fix CFA when doing split sp adjustment with fp

[Luís Marques via Phabricator via llvm-commits]

luismarques created this revision.
luismarques added reviewers: asb, lenary, shiva0217.
Herald added subscribers: llvm-commits, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.

When using the split sp adjustment and using the frame-pointer we were still emitting CFI CFA directives based on the sp value. The final sp-based offset also didn't reflect the two-stage sp adjust.

(I'm posting this patch for review now to be available for the weekly RISC-V LLVM sync-up meeting, but I need to take a second look at this to double-check that the fix is correct).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D69385

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/test/CodeGen/RISCV/large-stack.ll


Index: llvm/test/CodeGen/RISCV/large-stack.ll
===================================================================
--- llvm/test/CodeGen/RISCV/large-stack.ll
+++ llvm/test/CodeGen/RISCV/large-stack.ll
@@ -32,13 +32,11 @@
 ; RV32I-WITHFP-NEXT:    lui a0, 74565
 ; RV32I-WITHFP-NEXT:    addi a0, a0, -352
 ; RV32I-WITHFP-NEXT:    sub sp, sp, a0
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa_offset 305419920
 ; RV32I-WITHFP-NEXT:    lui a0, 74565
 ; RV32I-WITHFP-NEXT:    addi a0, a0, -352
 ; RV32I-WITHFP-NEXT:    add sp, sp, a0
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa_offset 2032
 ; RV32I-WITHFP-NEXT:    lw s0, 2024(sp)
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa sp, 305419920
+; RV32I-WITHFP-NEXT:    .cfi_def_cfa sp, 2032
 ; RV32I-WITHFP-NEXT:    lw ra, 2028(sp)
 ; RV32I-WITHFP-NEXT:    .cfi_restore ra
 ; RV32I-WITHFP-NEXT:    .cfi_restore s0
@@ -105,7 +103,6 @@
 ; RV32I-WITHFP-NEXT:    lui a1, 97
 ; RV32I-WITHFP-NEXT:    addi a1, a1, 688
 ; RV32I-WITHFP-NEXT:    sub sp, sp, a1
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa_offset 400032
 ; RV32I-WITHFP-NEXT:    lui a1, 78
 ; RV32I-WITHFP-NEXT:    addi a1, a1, 512
 ; RV32I-WITHFP-NEXT:    lui a2, 1048478
@@ -123,11 +120,10 @@
 ; RV32I-WITHFP-NEXT:    lui a0, 97
 ; RV32I-WITHFP-NEXT:    addi a0, a0, 688
 ; RV32I-WITHFP-NEXT:    add sp, sp, a0
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa_offset 2032
 ; RV32I-WITHFP-NEXT:    lw s2, 2016(sp)
 ; RV32I-WITHFP-NEXT:    lw s1, 2020(sp)
 ; RV32I-WITHFP-NEXT:    lw s0, 2024(sp)
-; RV32I-WITHFP-NEXT:    .cfi_def_cfa sp, 400032
+; RV32I-WITHFP-NEXT:    .cfi_def_cfa sp, 2032
 ; RV32I-WITHFP-NEXT:    lw ra, 2028(sp)
 ; RV32I-WITHFP-NEXT:    .cfi_restore ra
 ; RV32I-WITHFP-NEXT:    .cfi_restore s0
Index: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -195,11 +195,13 @@
            "SecondSPAdjustAmount should be greater than zero");
     adjustReg(MBB, MBBI, DL, SPReg, SPReg, -SecondSPAdjustAmount,
               MachineInstr::FrameSetup);
-    // Emit ".cfi_def_cfa_offset StackSize"
-    unsigned CFIIndex = MF.addFrameInst(
-        MCCFIInstruction::createDefCfaOffset(nullptr, -MFI.getStackSize()));
-    BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
-        .addCFIIndex(CFIIndex);
+    if (!hasFP(MF)) {
+      // Emit ".cfi_def_cfa_offset StackSize"
+      unsigned CFIIndex = MF.addFrameInst(
+          MCCFIInstruction::createDefCfaOffset(nullptr, -MFI.getStackSize()));
+      BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
+          .addCFIIndex(CFIIndex);
+    }
   }
 
   if (hasFP(MF)) {
@@ -266,12 +268,13 @@
               MachineInstr::FrameDestroy);
 
     // Emit ".cfi_def_cfa_offset FirstSPAdjustAmount"
-    unsigned CFIIndex =
-        MF.addFrameInst(
-             MCCFIInstruction::createDefCfaOffset(nullptr,
-                                                  -FirstSPAdjustAmount));
-    BuildMI(MBB, LastFrameDestroy, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
-        .addCFIIndex(CFIIndex);
+    if (!hasFP(MF)) {
+      unsigned CFIIndex = MF.addFrameInst(
+          MCCFIInstruction::createDefCfaOffset(nullptr, -FirstSPAdjustAmount));
+      BuildMI(MBB, LastFrameDestroy, DL,
+              TII->get(TargetOpcode::CFI_INSTRUCTION))
+          .addCFIIndex(CFIIndex);
+    }
   }
 
   if (hasFP(MF)) {
@@ -281,10 +284,12 @@
         Register DestReg = I->getOperand(0).getReg();
         if (DestReg == FPReg) {
           // If there is frame pointer, after restoring $fp registers, we
-          // need adjust CFA to ($sp - FPOffset).
-          // Emit ".cfi_def_cfa $sp, -FPOffset"
+          // need adjust CFA back to the correct sp-based offset.
+          // Emit ".cfi_def_cfa $sp, CFAOffset"
+          uint64_t CFAOffset =
+              FirstSPAdjustAmount ? -FirstSPAdjustAmount : -FPOffset;
           unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::createDefCfa(
-              nullptr, RI->getDwarfRegNum(SPReg, true), -FPOffset));
+              nullptr, RI->getDwarfRegNum(SPReg, true), CFAOffset));
           BuildMI(MBB, std::next(I), DL,
                   TII->get(TargetOpcode::CFI_INSTRUCTION))
               .addCFIIndex(CFIIndex);


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