[PATCH] D69367: [GlobalISel][AArch64][AMDGPU][X86] Teach LegalizationArtifactCombiner to combine trunc(g_constant).
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 24 00:24:38 PDT 2019
craig.topper created this revision.
craig.topper added reviewers: arsenm, aemerson, paquette, dsanders.
Herald added subscribers: Petar.Avramovic, kristof.beyls, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
Herald added a project: LLVM.
This allows X86 to properly form shift by immediate instructions
since we require an 8-bit constant to match the imported
SelectionDAG patterns.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D69367
Files:
llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ext-legalizer.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
llvm/test/CodeGen/X86/GlobalISel/ext.ll
llvm/test/CodeGen/X86/GlobalISel/gep.ll
llvm/test/CodeGen/X86/GlobalISel/legalize-ext-x86-64.mir
llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll
llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-sitofp.mir
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