[PATCH] D69246: [RISCV] Add support for half-precision floats

[Luís Marques via Phabricator via llvm-commits]

luismarques added a comment.

In D69246#1716972 <https://reviews.llvm.org/D69246#1716972>, @lenary wrote:

> No exception for half-precision floats has been included in the RISC-V ELF psABI (one would expect they should use the FP calling convention, as they are an FP real value). This should perhaps be rectified, but separately to this patch. I'll make a note.


It's probably a good idea to clarify the psABI's stance on half floats (possibly including not having any opinion about that), but do beware that this issue transcends the ABI. This half-float is being promoted at the LLVM IR level to a single-precision float, and once that happens everything behaves normally. What happens before the promotion is an LLVM implementation detail, so probably outside the scope of the ABI docs.


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https://reviews.llvm.org/D69246