[llvm] 684ebc6 - Revert 4334892e7b "[DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node."
Hans Wennborg via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 23 10:53:05 PDT 2019
Author: Hans Wennborg
Date: 2019-10-23T19:52:02+02:00
New Revision: 684ebc605e0b7f8782e634e1bb3621a9b0ec674f
URL: https://github.com/llvm/llvm-project/commit/684ebc605e0b7f8782e634e1bb3621a9b0ec674f
DIFF: https://github.com/llvm/llvm-project/commit/684ebc605e0b7f8782e634e1bb3621a9b0ec674f.diff
LOG: Revert 4334892e7b "[DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node."
This broke various Windows builds, see comments on the Phabricator
review.
This also reverts the follow-up 20bf0cf.
> Summary:
> This fold, helps recover from the rest of the D62266 ARM regressions.
> https://rise4fun.com/Alive/TvpC
>
> Note that while the fold is quite flexible, i've restricted it
> to the single interesting pattern at the moment.
>
> Reviewers: efriedma, craig.topper, spatel, RKSimon, deadalnix
>
> Reviewed By: deadalnix
>
> Subscribers: javed.absar, kristof.beyls, llvm-commits
>
> Tags: #llvm
>
> Differential Revision: https://reviews.llvm.org/D62450
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/ARM/addsubcarry-promotion.ll
Removed:
llvm/test/CodeGen/X86/pr43769.ll
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 1fd4af5954f0..a58fca7e73f5 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4268,13 +4268,6 @@ class TargetLowering : public TargetLoweringBase {
SDValue buildSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode,
ISD::CondCode Cond, DAGCombinerInfo &DCI,
const SDLoc &DL) const;
-
- /// x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node.
- SDValue optimizeSetCCToComparisonWithZero(EVT SCCVT, SDValue N0,
- ConstantSDNode *N1C,
- ISD::CondCode Cond,
- DAGCombinerInfo &DCI,
- const SDLoc &DL) const;
};
/// Given an LLVM IR type and return type attributes, compute the return value
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 5af2663d29e5..9ab1324533f1 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3045,66 +3045,6 @@ SDValue TargetLowering::foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1,
return DAG.getSetCC(DL, VT, X, YShl1, Cond);
}
-/// x ==/!= c -> (x - c) ==/!= 0 iff '-c' can be folded into the x node.
-SDValue TargetLowering::optimizeSetCCToComparisonWithZero(
- EVT SCCVT, SDValue N0, ConstantSDNode *N1C, ISD::CondCode Cond,
- DAGCombinerInfo &DCI, const SDLoc &DL) const {
- assert((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
- "Only for equality-comparisons.");
-
- // The constant we are comparing with must be a non-zero, non-opaque constant.
- if (N1C->isNullValue() || N1C->isOpaque())
- return SDValue();
-
- // LHS should not be used elsewhere, to avoid creating an extra node.
- if (!N0.hasOneUse())
- return SDValue();
-
- // Will we able to fold the '-c' into 'x' node?
- bool IsAdd;
- switch (N0.getOpcode()) {
- default:
- return SDValue(); // Don't know about that node.
- case ISD::ADD:
- case ISD::SUB:
- return SDValue(); // Let's not touch these.
- case ISD::ADDCARRY:
- IsAdd = true;
- break;
- case ISD::SUBCARRY:
- IsAdd = false;
- break;
- }
-
- // Second operand must be a non-opaque constant.
- ConstantSDNode *N01C = isConstOrConstSplat(N0.getOperand(1));
- if (!N01C || N01C->isOpaque())
- return SDValue();
-
- // And let's be even more specific for now, it must be a zero constant.
- // It is possible to relax this requirement, but a precise cost-model needed.
- if (!N01C->isNullValue())
- return SDValue();
-
- SelectionDAG &DAG = DCI.DAG;
- EVT OpVT = N0.getValueType();
-
- // (y + N01C) - N1C = y + (N01C - N1C)
- // (y - N01C) - N1C = y - (N01C + N1C)
- SDValue NewC = DAG.FoldConstantArithmetic(IsAdd ? ISD::SUB : ISD::ADD, DL,
- OpVT, N01C, N1C);
- assert(NewC && "Constant-folding failed!");
-
- SmallVector<SDValue, 3> N0Ops(N0.getNode()->ops().begin(),
- N0.getNode()->ops().end());
- N0Ops[1] = NewC;
-
- N0 = DAG.getNode(N0.getOpcode(), DL, N0->getVTList(), N0Ops);
-
- SDValue Zero = DAG.getConstant(0, DL, OpVT);
- return DAG.getSetCC(DL, SCCVT, N0, Zero, Cond);
-}
-
/// Try to simplify a setcc built with the specified operands and cc. If it is
/// unable to simplify it, return a null SDValue.
SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
@@ -3638,11 +3578,6 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
return CC;
}
- if (Cond == ISD::SETEQ || Cond == ISD::SETNE)
- if (SDValue CC =
- optimizeSetCCToComparisonWithZero(VT, N0, N1C, Cond, DCI, dl))
- return CC;
-
// If we have "setcc X, C0", check to see if we can shrink the immediate
// by changing cc.
// TODO: Support this for vectors after legalize ops.
diff --git a/llvm/test/CodeGen/ARM/addsubcarry-promotion.ll b/llvm/test/CodeGen/ARM/addsubcarry-promotion.ll
index ea670e5584e7..aaf7189a6bbe 100644
--- a/llvm/test/CodeGen/ARM/addsubcarry-promotion.ll
+++ b/llvm/test/CodeGen/ARM/addsubcarry-promotion.ll
@@ -14,35 +14,61 @@ define void @fn1(i32 %a, i32 %b, i32 %c) local_unnamed_addr #0 {
; ARM-NEXT: adds r0, r1, r0
; ARM-NEXT: movw r1, #65535
; ARM-NEXT: sxth r2, r2
-; ARM-NEXT: adc r0, r2, #1
-; ARM-NEXT: tst r0, r1
+; ARM-NEXT: adc r0, r2, #0
+; ARM-NEXT: uxth r0, r0
+; ARM-NEXT: cmp r0, r1
; ARM-NEXT: bxeq lr
; ARM-NEXT: .LBB0_1: @ %for.cond
; ARM-NEXT: @ =>This Inner Loop Header: Depth=1
; ARM-NEXT: b .LBB0_1
;
-; THUMB1-LABEL: fn1:
-; THUMB1: @ %bb.0: @ %entry
-; THUMB1-NEXT: rsbs r2, r2, #0
-; THUMB1-NEXT: sxth r2, r2
-; THUMB1-NEXT: movs r3, #1
-; THUMB1-NEXT: adds r0, r1, r0
-; THUMB1-NEXT: adcs r3, r2
-; THUMB1-NEXT: lsls r0, r3, #16
-; THUMB1-NEXT: beq .LBB0_2
-; THUMB1-NEXT: .LBB0_1: @ %for.cond
-; THUMB1-NEXT: @ =>This Inner Loop Header: Depth=1
-; THUMB1-NEXT: b .LBB0_1
-; THUMB1-NEXT: .LBB0_2: @ %if.end
-; THUMB1-NEXT: bx lr
+; THUMBV6M-LABEL: fn1:
+; THUMBV6M: @ %bb.0: @ %entry
+; THUMBV6M-NEXT: rsbs r2, r2, #0
+; THUMBV6M-NEXT: sxth r2, r2
+; THUMBV6M-NEXT: movs r3, #0
+; THUMBV6M-NEXT: adds r0, r1, r0
+; THUMBV6M-NEXT: adcs r3, r2
+; THUMBV6M-NEXT: uxth r0, r3
+; THUMBV6M-NEXT: ldr r1, .LCPI0_0
+; THUMBV6M-NEXT: cmp r0, r1
+; THUMBV6M-NEXT: beq .LBB0_2
+; THUMBV6M-NEXT: .LBB0_1: @ %for.cond
+; THUMBV6M-NEXT: @ =>This Inner Loop Header: Depth=1
+; THUMBV6M-NEXT: b .LBB0_1
+; THUMBV6M-NEXT: .LBB0_2: @ %if.end
+; THUMBV6M-NEXT: bx lr
+; THUMBV6M-NEXT: .p2align 2
+; THUMBV6M-NEXT: @ %bb.3:
+; THUMBV6M-NEXT: .LCPI0_0:
+; THUMBV6M-NEXT: .long 65535 @ 0xffff
+;
+; THUMBV8M-BASE-LABEL: fn1:
+; THUMBV8M-BASE: @ %bb.0: @ %entry
+; THUMBV8M-BASE-NEXT: rsbs r2, r2, #0
+; THUMBV8M-BASE-NEXT: sxth r2, r2
+; THUMBV8M-BASE-NEXT: movs r3, #0
+; THUMBV8M-BASE-NEXT: adds r0, r1, r0
+; THUMBV8M-BASE-NEXT: adcs r3, r2
+; THUMBV8M-BASE-NEXT: uxth r0, r3
+; THUMBV8M-BASE-NEXT: movw r1, #65535
+; THUMBV8M-BASE-NEXT: cmp r0, r1
+; THUMBV8M-BASE-NEXT: beq .LBB0_2
+; THUMBV8M-BASE-NEXT: .LBB0_1: @ %for.cond
+; THUMBV8M-BASE-NEXT: @ =>This Inner Loop Header: Depth=1
+; THUMBV8M-BASE-NEXT: b .LBB0_1
+; THUMBV8M-BASE-NEXT: .LBB0_2: @ %if.end
+; THUMBV8M-BASE-NEXT: bx lr
;
; THUMB-LABEL: fn1:
; THUMB: @ %bb.0: @ %entry
; THUMB-NEXT: rsbs r2, r2, #0
; THUMB-NEXT: adds r0, r0, r1
+; THUMB-NEXT: movw r1, #65535
; THUMB-NEXT: sxth r2, r2
-; THUMB-NEXT: adc r0, r2, #1
-; THUMB-NEXT: lsls r0, r0, #16
+; THUMB-NEXT: adc r0, r2, #0
+; THUMB-NEXT: uxth r0, r0
+; THUMB-NEXT: cmp r0, r1
; THUMB-NEXT: it eq
; THUMB-NEXT: bxeq lr
; THUMB-NEXT: .LBB0_1: @ %for.cond
diff --git a/llvm/test/CodeGen/X86/pr43769.ll b/llvm/test/CodeGen/X86/pr43769.ll
deleted file mode 100644
index fb6cd95c5325..000000000000
--- a/llvm/test/CodeGen/X86/pr43769.ll
+++ /dev/null
@@ -1,54 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-w64-windows-gnu %s -o - | FileCheck %s
-
-; Reduced from https://bugs.llvm.org/show_bug.cgi?id=43769
-
-define i32 @b(i32 %a, i32* %c, i32 %d) {
-; CHECK-LABEL: b:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cmpl $0, {{[0-9]+}}(%esp)
-; CHECK-NEXT: je LBB0_4
-; CHECK-NEXT: # %bb.1: # %for.body.lr.ph
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
-; CHECK-NEXT: movl %eax, %ecx
-; CHECK-NEXT: sarl $31, %ecx
-; CHECK-NEXT: addl $-2147483647, %eax # imm = 0x80000001
-; CHECK-NEXT: adcl $0, %ecx
-; CHECK-NEXT: jne LBB0_4
-; CHECK-NEXT: # %bb.2: # %for.body.lr.ph.peel.newph
-; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: movl $-2147483647, %edx # imm = 0x80000001
-; CHECK-NEXT: movl %ecx, %eax
-; CHECK-NEXT: sarl $31, %eax
-; CHECK-NEXT: addl %ecx, %edx
-; CHECK-NEXT: adcl $0, %eax
-; CHECK-NEXT: .p2align 4, 0x90
-; CHECK-NEXT: LBB0_3: # %for.body
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: testl %eax, %eax
-; CHECK-NEXT: je LBB0_3
-; CHECK-NEXT: LBB0_4: # %for.end
-; CHECK-NEXT: retl
-entry:
- %tobool3 = icmp eq i32 %a, 0
- br i1 %tobool3, label %for.end, label %for.body.lr.ph
-
-for.body.lr.ph: ; preds = %entry
- %0 = ptrtoint i32* %c to i32
- %conv.peel = sext i32 %d to i64
- %add.peel = add nsw i64 %conv.peel, 2147483649
- %tobool1.peel = icmp ugt i64 %add.peel, 4294967295
- br i1 %tobool1.peel, label %for.end, label %for.body.lr.ph.peel.newph
-
-for.body.lr.ph.peel.newph: ; preds = %for.body.lr.ph
- %conv = sext i32 %0 to i64
- %add = add nsw i64 %conv, 2147483649
- %tobool1 = icmp ugt i64 %add, 4294967295
- br label %for.body
-
-for.body: ; preds = %for.body, %for.body.lr.ph.peel.newph
- br i1 %tobool1, label %for.end, label %for.body
-
-for.end: ; preds = %for.body.lr.ph, %for.body, %entry
- ret i32 undef
-}
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