[PATCH] D68946: [MIParser] Set RegClassOrRegBank during instruction parsing

[Petar Avramovic via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG95290827d7d0: [MIParser] Set RegClassOrRegBank during instruction parsing (authored by Petar.Avramovic).
Herald added a subscriber: hiraditya.

Changed prior to commit:
  https://reviews.llvm.org/D68946?vs=225181&id=226047#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68946/new/

https://reviews.llvm.org/D68946

Files:
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir

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