[PATCH] D68443: [PowerPC] Spill CR LT bits on P9 using setb

[Victor Huang via Phabricator via llvm-commits]

NeHuang added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:783
+    if (Subtarget.isISA3_0()) {
+        if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR1LT ||
+            SrcReg == PPC::CR2LT || SrcReg == PPC::CR3LT ||
----------------
nit: alignment. Two less space before "if"


================
Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:790
+          break;
+        }
+    }
----------------
nit: alignment. same as line 783.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68443/new/

https://reviews.llvm.org/D68443