[PATCH] D68893: AMDGPU: Split flat offsets that don't fit in DAG

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D68893#1715467 <https://reviews.llvm.org/D68893#1715467>, @arsenm wrote:

> In D68893#1715404 <https://reviews.llvm.org/D68893#1715404>, @rampitec wrote:
>
> > I.e. ideally we want:
> >
> > load p
> >  load p+128
> >  load p+256
> >  ...
> >  load p+2048-128
> >  p1 = p + 2048
> >  load p1
> >  load p1 + 128
> >  load p1 + 256
> >  ...
> >
> > etc for a 128 byte stride.
>
>
> This would be better, but picking the base constant to use is more difficult. I think this is a next step beyond this patch. I'm not sure splitting this in the IR will work out, as the DAG will try to fold the adds of constants pack together


I think the real problem is treating the base constant as the subtract of the offset that fits. If this was just extracting low bits, in typical usage the base add and constant would end up being the same. I got confused by the signed addressing modes initially, and ended up treating it this way. Next I'll try extract the bits again


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