[PATCH] D66983: [WebAssembly] Add wasm-specific vector shuffle builtin and intrinsic

[Heejin Ahn via Phabricator via llvm-commits]

aheejin added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsWebAssembly.td:117
+             llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
+             llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
+            [IntrNoMem, IntrSpeculatable]>;
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i32 is bigger than `ImmLaneIdx32`. Should we model this into something smaller, like i8? What happens if we specify an index grater than 31? (I think this question also applies to other intrinsics and builtins. I don't think it matters a lot given than all integers are larger than lane types though.)


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Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:1251
+    return DAG.getNode(WebAssemblyISD::SHUFFLE, DL, Op.getValueType(), Ops);
+  }
   }
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This looks rather straightforward... Can't we do this in TableGen?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66983/new/

https://reviews.llvm.org/D66983