[PATCH] D69130: [RISCV] Implement the TargetLowering::getRegisterByName hook
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 17 12:35:47 PDT 2019
luismarques created this revision.
luismarques added reviewers: asb, lenary.
Herald added subscribers: llvm-commits, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, MaskRay, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, hiraditya.
Herald added a project: LLVM.
luismarques added a parent revision: D67185: [RISCV] Add support for -ffixed-xX flags.
The hook should work for any RISC-V register. For registers `X0` - `X4` they do not need to be reserved, for the remaining the hook will only succeed if you pass clang the `-ffixed-xX` flag. This builds upon D67185 <https://reviews.llvm.org/D67185>, which currently only allows reserving GPRs.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D69130
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/get-register-invalid.ll
llvm/test/CodeGen/RISCV/get-register-noreserve.ll
llvm/test/CodeGen/RISCV/get-register-reserve.ll
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