[PATCH] D69118: [AArch64] Move the branch relaxation pass after BTI insertion
Momchil Velikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 17 10:14:21 PDT 2019
chill updated this revision to Diff 225458.
chill added a comment.
Updated pipeline tests.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69118/new/
https://reviews.llvm.org/D69118
Files:
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/test/CodeGen/AArch64/O0-pipeline.ll
llvm/test/CodeGen/AArch64/O3-pipeline.ll
Index: llvm/test/CodeGen/AArch64/O3-pipeline.ll
===================================================================
--- llvm/test/CodeGen/AArch64/O3-pipeline.ll
+++ llvm/test/CodeGen/AArch64/O3-pipeline.ll
@@ -163,8 +163,8 @@
; CHECK-NEXT: MachinePostDominator Tree Construction
; CHECK-NEXT: Branch Probability Basic Block Placement
; CHECK-NEXT: AArch64 load / store optimization pass
-; CHECK-NEXT: Branch relaxation pass
; CHECK-NEXT: AArch64 Branch Targets
+; CHECK-NEXT: Branch relaxation pass
; CHECK-NEXT: AArch64 Compress Jump Tables
; CHECK-NEXT: Contiguously Lay Out Funclets
; CHECK-NEXT: StackMap Liveness Analysis
Index: llvm/test/CodeGen/AArch64/O0-pipeline.ll
===================================================================
--- llvm/test/CodeGen/AArch64/O0-pipeline.ll
+++ llvm/test/CodeGen/AArch64/O0-pipeline.ll
@@ -58,8 +58,8 @@
; CHECK-NEXT: AArch64 pseudo instruction expansion pass
; CHECK-NEXT: AArch64 speculation hardening pass
; CHECK-NEXT: Analyze Machine Code For Garbage Collection
-; CHECK-NEXT: Branch relaxation pass
; CHECK-NEXT: AArch64 Branch Targets
+; CHECK-NEXT: Branch relaxation pass
; CHECK-NEXT: Contiguously Lay Out Funclets
; CHECK-NEXT: StackMap Liveness Analysis
; CHECK-NEXT: Live DEBUG_VALUE analysis
Index: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -609,14 +609,15 @@
if (EnableA53Fix835769)
addPass(createAArch64A53Fix835769());
+
+ if (EnableBranchTargets)
+ addPass(createAArch64BranchTargetsPass());
+
// Relax conditional branch instructions if they're otherwise out of
// range of their destination.
if (BranchRelaxation)
addPass(&BranchRelaxationPassID);
- if (EnableBranchTargets)
- addPass(createAArch64BranchTargetsPass());
-
if (TM->getOptLevel() != CodeGenOpt::None && EnableCompressJumpTables)
addPass(createAArch64CompressJumpTablesPass());
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