[PATCH] D69065: [AMDGPU] Do not combine dpp mov reading physregs
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 16 12:22:02 PDT 2019
rampitec created this revision.
rampitec added reviewers: arsenm, vpykhtin, mjbedy, kzhuravl.
Herald added subscribers: MaskRay, kbarton, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, nemanjai.
Herald added a project: LLVM.
We cannot be sure physregs will stay unchanged.
https://reviews.llvm.org/D69065
Files:
llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
llvm/test/CodeGen/AMDGPU/dpp_combine.mir
Index: llvm/test/CodeGen/AMDGPU/dpp_combine.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/dpp_combine.mir
+++ llvm/test/CodeGen/AMDGPU/dpp_combine.mir
@@ -575,6 +575,30 @@
%2:vgpr_32 = V_CEIL_F32_e32 $vgpr0, implicit $exec
...
+# Do not combine a dpp mov which reads a physreg.
+# GCN-LABEL: name: phys_dpp_mov_old_src
+# GCN: %0:vgpr_32 = V_MOV_B32_dpp undef $vgpr0, undef %1:vgpr_32, 1, 15, 15, 1, implicit $exec
+# GCN: %2:vgpr_32 = V_CEIL_F32_e32 %0, implicit $exec
+name: phys_dpp_mov_old_src
+tracksRegLiveness: true
+body: |
+ bb.0:
+ %1:vgpr_32 = V_MOV_B32_dpp undef $vgpr0, undef %0:vgpr_32, 1, 15, 15, 1, implicit $exec
+ %2:vgpr_32 = V_CEIL_F32_e32 %1, implicit $exec
+...
+
+# Do not combine a dpp mov which reads a physreg.
+# GCN-LABEL: name: phys_dpp_mov_src
+# GCN: %0:vgpr_32 = V_MOV_B32_dpp undef %1:vgpr_32, undef $vgpr0, 1, 15, 15, 1, implicit $exec
+# GCN: %2:vgpr_32 = V_CEIL_F32_e32 %0, implicit $exec
+name: phys_dpp_mov_src
+tracksRegLiveness: true
+body: |
+ bb.0:
+ %1:vgpr_32 = V_MOV_B32_dpp undef %0:vgpr_32, undef $vgpr0, 1, 15, 15, 1, implicit $exec
+ %2:vgpr_32 = V_CEIL_F32_e32 %1, implicit $exec
+...
+
# GCN-LABEL: name: dpp_reg_sequence_both_combined
# GCN: %0:vreg_64 = COPY $vgpr0_vgpr1
# GCN: %1:vreg_64 = COPY $vgpr2_vgpr3
Index: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
+++ llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
@@ -375,7 +375,13 @@
bool BoundCtrlZero = BCZOpnd->getImm();
auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old);
+ auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0);
assert(OldOpnd && OldOpnd->isReg());
+ assert(SrcOpnd && SrcOpnd->isReg());
+ if (OldOpnd->getReg().isPhysical() || SrcOpnd->getReg().isPhysical()) {
+ LLVM_DEBUG(dbgs() << " failed: dpp move reads physreg\n");
+ return false;
+ }
auto * const OldOpndValue = getOldOpndValue(*OldOpnd);
// OldOpndValue is either undef (IMPLICIT_DEF) or immediate or something else
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D69065.225287.patch
Type: text/x-patch
Size: 2139 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191016/2e63f341/attachment-0001.bin>
More information about the llvm-commits
mailing list