[PATCH] D68341: [AIX] TOC pseudo expansion for 64bit large + 64bit small + 32bit large modes

[Hubert Tong via Phabricator via llvm-commits]

hubert.reinterpretcast added inline comments.


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Comment at: llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll:17
+; SMALL: ld [[REG1:[0-9]+]], LC0(2)
+; SMALL: lwz [[REG2:[0-9]+]], 0([[REG1]])
+; SMALL: blr
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hubert.reinterpretcast wrote:
> Just a note:
> Currently, the front-end seems to not generate `signext` or `zeroext` into the IR for 64-bit AIX. It seems the default behaviour matches `zeroext` (meaning the return type is unsigned).
We discussed this today, and we want to explicitly add the `zeroext` in (or `signext` if that is was is intended). @Xiangling_L, please add this change on the commit as well. Thanks.


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  https://reviews.llvm.org/D68341/new/

https://reviews.llvm.org/D68341