[llvm] r374877 - [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field
Jeremy Morse via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 15 03:46:24 PDT 2019
Author: jmorse
Date: Tue Oct 15 03:46:24 2019
New Revision: 374877
URL: http://llvm.org/viewvc/llvm-project?rev=374877&view=rev
Log:
[DebugInfo] Remove some users of DBG_VALUEs IsIndirect field
This patch kills off a significant user of the "IsIndirect" field of
DBG_VALUE machine insts. Brought up in in PR41675, IsIndirect is
techncally redundant as it can be expressed by the DIExpression of a
DBG_VALUE inst, and it isn't helpful to have two ways of expressing
things.
Rather than setting IsIndirect, have DBG_VALUE creators add an extra deref
to the insts DIExpression. There should now be no appearences of
IsIndirect=True from isel down to LiveDebugVariables / VirtRegRewriter,
which is ensured by an assertion in LDVImpl::handleDebugValue. This means
we also get to delete the IsIndirect handling in LiveDebugVariables. Tests
can be upgraded by for example swapping the following IsIndirect=True
DBG_VALUE:
DBG_VALUE $somereg, 0, !123, !DIExpression(DW_OP_foo)
With one where the indirection is in the DIExpression, by _appending_
a deref:
DBG_VALUE $somereg, $noreg, !123, !DIExpression(DW_OP_foo, DW_OP_deref)
Which both mean the same thing.
Most of the test changes in this patch are updates of that form; also some
changes in how the textual assembly printer handles these insts.
Differential Revision: https://reviews.llvm.org/D68945
Modified:
llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll
llvm/trunk/test/CodeGen/PowerPC/debuginfo-stackarg.ll
llvm/trunk/test/DebugInfo/ARM/PR16736.ll
llvm/trunk/test/DebugInfo/ARM/float-stack-arg.ll
llvm/trunk/test/DebugInfo/COFF/pieces.ll
llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll
llvm/trunk/test/DebugInfo/X86/dbg-addr.ll
llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir
llvm/trunk/test/DebugInfo/X86/op_deref.ll
llvm/trunk/test/DebugInfo/X86/parameters.ll
llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll
llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll
llvm/trunk/test/DebugInfo/X86/vla.ll
Modified: llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp Tue Oct 15 03:46:24 2019
@@ -1378,7 +1378,7 @@ bool IRTranslator::translateKnownIntrins
if (!V) {
// Currently the optimizer can produce this; insert an undef to
// help debugging. Probably the optimizer should not do this.
- MIRBuilder.buildIndirectDbgValue(0, DI.getVariable(), DI.getExpression());
+ MIRBuilder.buildDirectDbgValue(0, DI.getVariable(), DI.getExpression());
} else if (const auto *CI = dyn_cast<Constant>(V)) {
MIRBuilder.buildConstDbgValue(*CI, DI.getVariable(), DI.getExpression());
} else {
Modified: llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp Tue Oct 15 03:46:24 2019
@@ -107,9 +107,13 @@ MachineIRBuilder::buildIndirectDbgValue(
assert(
cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(getDL()) &&
"Expected inlined-at fields to agree");
+ // DBG_VALUE insts now carry IR-level indirection in their DIExpression
+ // rather than encoding it in the instruction itself.
+ const DIExpression *DIExpr = cast<DIExpression>(Expr);
+ DIExpr = DIExpression::append(DIExpr, {dwarf::DW_OP_deref});
return insertInstr(BuildMI(getMF(), getDL(),
getTII().get(TargetOpcode::DBG_VALUE),
- /*IsIndirect*/ true, Reg, Variable, Expr));
+ /*IsIndirect*/ false, Reg, Variable, DIExpr));
}
MachineInstrBuilder MachineIRBuilder::buildFIDbgValue(int FI,
@@ -120,11 +124,15 @@ MachineInstrBuilder MachineIRBuilder::bu
assert(
cast<DILocalVariable>(Variable)->isValidLocationForIntrinsic(getDL()) &&
"Expected inlined-at fields to agree");
+ // DBG_VALUE insts now carry IR-level indirection in their DIExpression
+ // rather than encoding it in the instruction itself.
+ const DIExpression *DIExpr = cast<DIExpression>(Expr);
+ DIExpr = DIExpression::append(DIExpr, {dwarf::DW_OP_deref});
return buildInstr(TargetOpcode::DBG_VALUE)
.addFrameIndex(FI)
- .addImm(0)
+ .addReg(0)
.addMetadata(Variable)
- .addMetadata(Expr);
+ .addMetadata(DIExpr);
}
MachineInstrBuilder MachineIRBuilder::buildConstDbgValue(const Constant &C,
@@ -148,7 +156,7 @@ MachineInstrBuilder MachineIRBuilder::bu
MIB.addReg(0U);
}
- return MIB.addImm(0).addMetadata(Variable).addMetadata(Expr);
+ return MIB.addReg(0).addMetadata(Variable).addMetadata(Expr);
}
MachineInstrBuilder MachineIRBuilder::buildDbgLabel(const MDNode *Label) {
Modified: llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp Tue Oct 15 03:46:24 2019
@@ -99,28 +99,27 @@ enum : unsigned { UndefLocNo = ~0U };
/// usage of the location.
class DbgValueLocation {
public:
- DbgValueLocation(unsigned LocNo, bool WasIndirect)
- : LocNo(LocNo), WasIndirect(WasIndirect) {
+ DbgValueLocation(unsigned LocNo)
+ : LocNo(LocNo) {
static_assert(sizeof(*this) == sizeof(unsigned), "bad bitfield packing");
assert(locNo() == LocNo && "location truncation");
}
- DbgValueLocation() : LocNo(0), WasIndirect(0) {}
+ DbgValueLocation() : LocNo(0) {}
unsigned locNo() const {
// Fix up the undef location number, which gets truncated.
return LocNo == INT_MAX ? UndefLocNo : LocNo;
}
- bool wasIndirect() const { return WasIndirect; }
bool isUndef() const { return locNo() == UndefLocNo; }
DbgValueLocation changeLocNo(unsigned NewLocNo) const {
- return DbgValueLocation(NewLocNo, WasIndirect);
+ return DbgValueLocation(NewLocNo);
}
friend inline bool operator==(const DbgValueLocation &LHS,
const DbgValueLocation &RHS) {
- return LHS.LocNo == RHS.LocNo && LHS.WasIndirect == RHS.WasIndirect;
+ return LHS.LocNo == RHS.LocNo;
}
friend inline bool operator!=(const DbgValueLocation &LHS,
@@ -129,8 +128,7 @@ public:
}
private:
- unsigned LocNo : 31;
- unsigned WasIndirect : 1;
+ unsigned LocNo;
};
/// Map of where a user value is live, and its location.
@@ -261,8 +259,8 @@ public:
void mapVirtRegs(LDVImpl *LDV);
/// Add a definition point to this value.
- void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect) {
- DbgValueLocation Loc(getLocationNo(LocMO), IsIndirect);
+ void addDef(SlotIndex Idx, const MachineOperand &LocMO) {
+ DbgValueLocation Loc(getLocationNo(LocMO));
// Add a singular (Idx,Idx) -> Loc mapping.
LocMap::iterator I = locInts.find(Idx);
if (!I.valid() || I.start() != Idx)
@@ -297,11 +295,10 @@ public:
///
/// \param LI Scan for copies of the value in LI->reg.
/// \param LocNo Location number of LI->reg.
- /// \param WasIndirect Indicates if the original use of LI->reg was indirect
/// \param Kills Points where the range of LocNo could be extended.
/// \param [in,out] NewDefs Append (Idx, LocNo) of inserted defs here.
void addDefsFromCopies(
- LiveInterval *LI, unsigned LocNo, bool WasIndirect,
+ LiveInterval *LI, unsigned LocNo,
const SmallVectorImpl<SlotIndex> &Kills,
SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
MachineRegisterInfo &MRI, LiveIntervals &LIS);
@@ -521,8 +518,6 @@ void UserValue::print(raw_ostream &OS, c
OS << "undef";
else {
OS << I.value().locNo();
- if (I.value().wasIndirect())
- OS << " ind";
}
}
for (unsigned i = 0, e = locations.size(); i != e; ++i) {
@@ -631,19 +626,18 @@ bool LDVImpl::handleDebugValue(MachineIn
}
// Get or create the UserValue for (variable,offset) here.
- bool IsIndirect = MI.getOperand(1).isImm();
- if (IsIndirect)
- assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
+ assert(!MI.getOperand(1).isImm() && "DBG_VALUE with indirect flag before "
+ "LiveDebugVariables");
const DILocalVariable *Var = MI.getDebugVariable();
const DIExpression *Expr = MI.getDebugExpression();
UserValue *UV =
getUserValue(Var, Expr, MI.getDebugLoc());
if (!Discard)
- UV->addDef(Idx, MI.getOperand(0), IsIndirect);
+ UV->addDef(Idx, MI.getOperand(0));
else {
MachineOperand MO = MachineOperand::CreateReg(0U, false);
MO.setIsDebug();
- UV->addDef(Idx, MO, false);
+ UV->addDef(Idx, MO);
}
return true;
}
@@ -751,7 +745,7 @@ void UserValue::extendDef(SlotIndex Idx,
}
void UserValue::addDefsFromCopies(
- LiveInterval *LI, unsigned LocNo, bool WasIndirect,
+ LiveInterval *LI, unsigned LocNo,
const SmallVectorImpl<SlotIndex> &Kills,
SmallVectorImpl<std::pair<SlotIndex, DbgValueLocation>> &NewDefs,
MachineRegisterInfo &MRI, LiveIntervals &LIS) {
@@ -815,7 +809,7 @@ void UserValue::addDefsFromCopies(
MachineInstr *CopyMI = LIS.getInstructionFromIndex(DstVNI->def);
assert(CopyMI && CopyMI->isCopy() && "Bad copy value");
unsigned LocNo = getLocationNo(CopyMI->getOperand(0));
- DbgValueLocation NewLoc(LocNo, WasIndirect);
+ DbgValueLocation NewLoc(LocNo);
I.insert(Idx, Idx.getNextSlot(), NewLoc);
NewDefs.push_back(std::make_pair(Idx, NewLoc));
break;
@@ -863,8 +857,7 @@ void UserValue::computeIntervals(Machine
// sub-register in that regclass). For now, simply skip handling copies if
// a sub-register is involved.
if (LI && !LocMO.getSubReg())
- addDefsFromCopies(LI, Loc.locNo(), Loc.wasIndirect(), Kills, Defs, MRI,
- LIS);
+ addDefsFromCopies(LI, Loc.locNo(), Kills, Defs, MRI, LIS);
continue;
}
@@ -1302,21 +1295,14 @@ void UserValue::insertDebugValue(Machine
// that the original virtual register was a pointer. Also, add the stack slot
// offset for the spilled register to the expression.
const DIExpression *Expr = Expression;
- uint8_t DIExprFlags = DIExpression::ApplyOffset;
- bool IsIndirect = Loc.wasIndirect();
- if (Spilled) {
- if (IsIndirect)
- DIExprFlags |= DIExpression::DerefAfter;
- Expr =
- DIExpression::prepend(Expr, DIExprFlags, SpillOffset);
- IsIndirect = true;
- }
+ if (Spilled)
+ Expr = DIExpression::prepend(Expr, DIExpression::ApplyOffset, SpillOffset);
assert((!Spilled || MO.isFI()) && "a spilled location must be a frame index");
do {
BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
- IsIndirect, MO, Variable, Expr);
+ Spilled, MO, Variable, Expr);
// Continue and insert DBG_VALUES after every redefinition of register
// associated with the debug value within the range
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Tue Oct 15 03:46:24 2019
@@ -1389,9 +1389,11 @@ bool FastISel::selectIntrinsicCall(const
"Expected inlined-at fields to agree");
// A dbg.declare describes the address of a source variable, so lower it
// into an indirect DBG_VALUE.
+ auto *Expr = DI->getExpression();
+ Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
- TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ true,
- *Op, DI->getVariable(), DI->getExpression());
+ TII.get(TargetOpcode::DBG_VALUE), /*IsIndirect*/ false,
+ *Op, DI->getVariable(), Expr);
} else {
// We can't yet handle anything else here because it would require
// generating code, thus altering codegen because of debug info.
@@ -1415,19 +1417,19 @@ bool FastISel::selectIntrinsicCall(const
if (CI->getBitWidth() > 64)
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addCImm(CI)
- .addImm(0U)
+ .addReg(0U)
.addMetadata(DI->getVariable())
.addMetadata(DI->getExpression());
else
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addImm(CI->getZExtValue())
- .addImm(0U)
+ .addReg(0U)
.addMetadata(DI->getVariable())
.addMetadata(DI->getExpression());
} else if (const auto *CF = dyn_cast<ConstantFP>(V)) {
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II)
.addFPImm(CF)
- .addImm(0U)
+ .addReg(0U)
.addMetadata(DI->getVariable())
.addMetadata(DI->getExpression());
} else if (unsigned Reg = lookUpRegForValue(V)) {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/InstrEmitter.cpp Tue Oct 15 03:46:24 2019
@@ -677,7 +677,7 @@ MachineInstr *
InstrEmitter::EmitDbgValue(SDDbgValue *SD,
DenseMap<SDValue, unsigned> &VRBaseMap) {
MDNode *Var = SD->getVariable();
- MDNode *Expr = SD->getExpression();
+ const DIExpression *Expr = SD->getExpression();
DebugLoc DL = SD->getDebugLoc();
assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
"Expected inlined-at fields to agree");
@@ -701,12 +701,11 @@ InstrEmitter::EmitDbgValue(SDDbgValue *S
// EmitTargetCodeForFrameDebugValue is responsible for allocation.
auto FrameMI = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE))
.addFrameIndex(SD->getFrameIx());
+
if (SD->isIndirect())
- // Push [fi + 0] onto the DIExpression stack.
- FrameMI.addImm(0);
- else
- // Push fi onto the DIExpression stack.
- FrameMI.addReg(0);
+ Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
+
+ FrameMI.addReg(0);
return FrameMI.addMetadata(Var).addMetadata(Expr);
}
// Otherwise, we're going to create an instruction here.
@@ -752,9 +751,9 @@ InstrEmitter::EmitDbgValue(SDDbgValue *S
// Indirect addressing is indicated by an Imm as the second parameter.
if (SD->isIndirect())
- MIB.addImm(0U);
- else
- MIB.addReg(0U, RegState::Debug);
+ Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
+
+ MIB.addReg(0U, RegState::Debug);
MIB.addMetadata(Var);
MIB.addMetadata(Expr);
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Tue Oct 15 03:46:24 2019
@@ -5519,8 +5519,9 @@ bool SelectionDAGBuilder::EmitFuncArgume
Expr, Offset, RegAndSize.second);
if (!FragmentExpr)
continue;
+ assert(!IsDbgDeclare && "DbgDeclare operand is not in memory?");
FuncInfo.ArgDbgValues.push_back(
- BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsDbgDeclare,
+ BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), false,
RegAndSize.first, Variable, *FragmentExpr));
Offset += RegAndSize.second;
}
@@ -5554,8 +5555,10 @@ bool SelectionDAGBuilder::EmitFuncArgume
assert(Variable->isValidLocationForIntrinsic(DL) &&
"Expected inlined-at fields to agree");
IsIndirect = (Op->isReg()) ? IsIndirect : true;
+ if (IsIndirect)
+ Expr = DIExpression::append(Expr, {dwarf::DW_OP_deref});
FuncInfo.ArgDbgValues.push_back(
- BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), IsIndirect,
+ BuildMI(MF, DL, TII->get(TargetOpcode::DBG_VALUE), false,
*Op, Variable, Expr));
return true;
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll Tue Oct 15 03:46:24 2019
@@ -18,7 +18,7 @@ target triple = "aarch64-unknown-linux-g
%struct.NTCopy = type { i32 }
; CHECK-LABEL: name: _Z3foo6NTCopy
-; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !23, !DIExpression(), debug-location !24
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), $noreg, !23, !DIExpression(DW_OP_deref), debug-location !24
; Function Attrs: noinline nounwind optnone
define dso_local i32 @_Z3foo6NTCopy(%struct.NTCopy* %o) #0 !dbg !7 {
entry:
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll Tue Oct 15 03:46:24 2019
@@ -15,7 +15,7 @@ entry:
}
; CHECK-LABEL: name: debug_declare_vla
-; CHECK: DBG_VALUE %{{[0-9]+}}(p0), 0, !14, !DIExpression(), debug-location !15
+; CHECK: DBG_VALUE %{{[0-9]+}}(p0), $noreg, !14, !DIExpression(DW_OP_deref), debug-location !15
define void @debug_declare_vla(i32 %in) #0 !dbg !13 {
entry:
%vla.addr = alloca i32, i32 %in
@@ -32,11 +32,11 @@ define void @debug_value(i32 %in) #0 !db
store i32 %in, i32* %addr
; CHECK: DBG_VALUE %1(p0), $noreg, !17, !DIExpression(DW_OP_deref), debug-location !18
call void @llvm.dbg.value(metadata i32* %addr, i64 0, metadata !17, metadata !DIExpression(DW_OP_deref)), !dbg !18
-; CHECK: DBG_VALUE 123, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE 123, $noreg, !17, !DIExpression(), debug-location !18
call void @llvm.dbg.value(metadata i32 123, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
-; CHECK: DBG_VALUE float 1.000000e+00, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE float 1.000000e+00, $noreg, !17, !DIExpression(), debug-location !18
call void @llvm.dbg.value(metadata float 1.000000e+00, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
-; CHECK: DBG_VALUE $noreg, 0, !17, !DIExpression(), debug-location !18
+; CHECK: DBG_VALUE $noreg, $noreg, !17, !DIExpression(), debug-location !18
call void @llvm.dbg.value(metadata i32* null, i64 0, metadata !17, metadata !DIExpression()), !dbg !18
ret void
}
Modified: llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll Tue Oct 15 03:46:24 2019
@@ -11,7 +11,7 @@ define void @foo(%struct.tag_s* nocaptur
tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21
tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22
tail call void @llvm.dbg.value(metadata i64 %y, metadata !17, metadata !DIExpression()), !dbg !23
-;CHECK: @DEBUG_VALUE: foo:y <- [DW_OP_plus_uconst 8] [$r7+0]
+;CHECK: @DEBUG_VALUE: foo:y <- [DW_OP_plus_uconst 8, DW_OP_deref] $r7
tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr1, metadata !18, metadata !DIExpression()), !dbg !24
tail call void @llvm.dbg.value(metadata %struct.tag_s* %ptr2, metadata !19, metadata !DIExpression()), !dbg !25
%1 = icmp eq %struct.tag_s* %c, null, !dbg !26
Modified: llvm/trunk/test/CodeGen/PowerPC/debuginfo-stackarg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/debuginfo-stackarg.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/debuginfo-stackarg.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/debuginfo-stackarg.ll Tue Oct 15 03:46:24 2019
@@ -34,7 +34,7 @@ define i64 @foo(i64 %bar1, i64 %bar2, i6
; We expect to find a DBG_VALUE refering to the metadata id for bar5, using the lowest
; of the two fixed stack offsets found earlier.
; CHECK-LABEL: body:
-; CHECK: DBG_VALUE $r1, 0, !17, !DIExpression(DW_OP_plus_uconst, 8)
+; CHECK: DBG_VALUE $r1, $noreg, !17, !DIExpression(DW_OP_plus_uconst, 8, DW_OP_deref)
entry:
tail call void @llvm.dbg.value(metadata i64 %bar1, metadata !13, metadata !DIExpression()), !dbg !18
tail call void @llvm.dbg.value(metadata i64 %bar2, metadata !14, metadata !DIExpression()), !dbg !19
Modified: llvm/trunk/test/DebugInfo/ARM/PR16736.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/PR16736.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/PR16736.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/PR16736.ll Tue Oct 15 03:46:24 2019
@@ -2,7 +2,7 @@
; RUN: llc -filetype=obj < %s \
; RUN: | llvm-dwarfdump -debug-info - | FileCheck %s --check-prefix=DWARF
;
-; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}] [$r{{.*}}+0]
+; CHECK: @DEBUG_VALUE: h:x <- [DW_OP_plus_uconst {{.*}}, DW_OP_deref] $r{{.*}}
; DWARF: DW_TAG_formal_parameter
; DWARF: DW_AT_location
; DWARF-NEXT: DW_OP_reg0 R0
Modified: llvm/trunk/test/DebugInfo/ARM/float-stack-arg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/float-stack-arg.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/float-stack-arg.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/float-stack-arg.ll Tue Oct 15 03:46:24 2019
@@ -19,7 +19,7 @@
define arm_aapcscc float @fn1(i32 %p1, i32 %p2, i32 %p3, i32 %p4, float returned %p5) #0 !dbg !7 {
; CHECK-LABEL: bb.0.entry:
-; CHECK-NEXT: DBG_VALUE %fixed-stack.0, 0, ![[P5]]
+; CHECK-NEXT: DBG_VALUE %fixed-stack.0, $noreg, ![[P5]], !DIExpression(DW_OP_deref)
entry:
call void @llvm.dbg.value(metadata float %p5, metadata !17, metadata !DIExpression()), !dbg !18
ret float %p5, !dbg !19
Modified: llvm/trunk/test/DebugInfo/COFF/pieces.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/pieces.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/pieces.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/pieces.ll Tue Oct 15 03:46:24 2019
@@ -87,7 +87,7 @@
; ASM-LABEL: nested: # @nested
-; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] [$rcx+0]
+; ASM: #DEBUG_VALUE: nested:o <- [DW_OP_deref] $rcx
; ASM: movl 12(%rcx), %eax
; ASM: [[p_start:\.Ltmp[0-9]+]]:
; ASM: #DEBUG_VALUE: nested:p <- [DW_OP_LLVM_fragment 32 32] $eax
@@ -202,7 +202,7 @@
; OBJ: DisplayName: nested
; OBJ: }
; OBJ: LocalSym {
-; OBJ: Type: Nested&
+; OBJ: Type: Nested
; OBJ: VarName: o
; OBJ: }
; OBJ: DefRangeRegisterRelSym {
@@ -435,7 +435,7 @@ attributes #5 = { nounwind }
!70 = !{!71, !72}
!71 = !DILocalVariable(name: "o", arg: 1, scope: !61, file: !1, line: 27, type: !64)
!72 = !DILocalVariable(name: "p", scope: !61, file: !1, line: 28, type: !53)
-!73 = !DIExpression(DW_OP_deref)
+!73 = !DIExpression()
!74 = !DILocation(line: 27, column: 26, scope: !61)
!75 = !DILocation(line: 28, column: 18, scope: !61)
!76 = !DILocation(line: 28, column: 22, scope: !61)
Modified: llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-addr-dse.ll Tue Oct 15 03:46:24 2019
@@ -3,6 +3,10 @@
; RUN: FileCheck %s < %t.s --check-prefix=ASM
; RUN: llvm-dwarfdump %t.o | FileCheck %s --check-prefix=DWARF
+; XFAIL: *
+; See PR41992, the third and final dbg.value disappears after
+; LiveDebugVariables.
+
; In this example, the variable lives mostly in memory, but at the point of the
; assignment to global, it lives nowhere, and is described as the constant
; value 1.
@@ -46,12 +50,12 @@ entry:
}
; ASM-LABEL: f: # @f
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X:[0-9]+]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X:[0-9]+]], DW_OP_deref] $rsp
; ASM: movl %ecx, [[OFF_X]](%rsp)
; ASM: callq escape
; ASM: #DEBUG_VALUE: f:x <- 1
; ASM: movl $1, global(%rip)
-; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+; ASM: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
; ASM: movl $2, [[OFF_X]](%rsp)
; ASM: callq escape
; ASM: retq
Modified: llvm/trunk/test/DebugInfo/X86/dbg-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-addr.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-addr.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-addr.ll Tue Oct 15 03:46:24 2019
@@ -7,7 +7,7 @@
; is control-dependent.
; CHECK-LABEL: use_dbg_addr:
-; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [$rsp+0]
+; CHECK: #DEBUG_VALUE: use_dbg_addr:o <- [DW_OP_deref] $rsp
; DWARF: DW_TAG_variable
; DWARF-NEXT: DW_AT_location (DW_OP_fbreg +0)
Modified: llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir (original)
+++ llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir Tue Oct 15 03:46:24 2019
@@ -1,5 +1,9 @@
# RUN: llc -start-after=machine-scheduler %s -o - | FileCheck %s
+# XFAIL: *
+# See PR41992, the third and final dbg.value disappears after
+# LiveDebugVariables.
+
# C source:
# void escape(int *);
# extern int global;
@@ -13,12 +17,12 @@
# CHECK-LABEL: f: # @f
# CHECK: movl %ecx, [[OFF_X:[0-9]+]](%rsp)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
# CHECK: leaq [[OFF_X]](%rsp), %rsi
# CHECK: callq escape
# CHECK: #DEBUG_VALUE: f:x <- 1
# CHECK: movl $1, global(%rip)
-# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]]] [$rsp+0]
+# CHECK: #DEBUG_VALUE: f:x <- [DW_OP_plus_uconst [[OFF_X]], DW_OP_deref] $rsp
# CHECK: movl $2, [[OFF_X]](%rsp)
# CHECK: callq escape
# CHECK: retq
@@ -42,11 +46,11 @@
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
- call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !14
+ call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !14
call void @escape(i32* %x.addr), !dbg !15
call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !16
store i32 1, i32* @global, align 4, !dbg !17
- call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !18
+ call void @llvm.dbg.value(metadata i32* %x.addr, metadata !13, metadata !DIExpression(DW_OP_deref)), !dbg !18
store i32 2, i32* %x.addr, align 4, !dbg !18
call void @escape(i32* %x.addr), !dbg !19
ret void, !dbg !20
@@ -128,7 +132,7 @@ body: |
%0 = COPY $ecx
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0 :: (store 4 into %ir.x.addr)
- DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !14
+ DBG_VALUE %stack.0.x.addr, $noreg, !13, !DIExpression(DW_OP_deref), debug-location !14
ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
%1 = LEA64r %stack.0.x.addr, 1, _, 0, _
$rcx = COPY %1, debug-location !15
@@ -136,7 +140,7 @@ body: |
ADJCALLSTACKUP64 32, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !15
DBG_VALUE 1, _, !13, !DIExpression(), debug-location !16
MOV32mi $rip, 1, _, @global, _, 1, debug-location !17 :: (store 4 into @global)
- DBG_VALUE %stack.0.x.addr, 0, !13, !DIExpression(), debug-location !18
+ DBG_VALUE %stack.0.x.addr, $noreg, !13, !DIExpression(DW_OP_deref), debug-location !18
MOV32mi %stack.0.x.addr, 1, _, 0, _, 2, debug-location !18 :: (store 4 into %ir.x.addr)
ADJCALLSTACKDOWN64 32, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp, debug-location !19
$rcx = COPY %1, debug-location !19
Modified: llvm/trunk/test/DebugInfo/X86/op_deref.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/op_deref.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/op_deref.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/op_deref.ll Tue Oct 15 03:46:24 2019
@@ -6,10 +6,12 @@
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=DWARF3
; DWARF4: DW_AT_location [DW_FORM_sec_offset] (0x00000000
-; DWARF4-NEXT: {{.*}}: DW_OP_breg1 RDX+0, DW_OP_deref
+; DWARF4-NEXT: {{.*}}: DW_OP_breg1 RDX+0{{$}}
+; DWARF4-NEXT: {{.*}}: DW_OP_breg6 RBP-{{[0-9]+}}, DW_OP_deref)
; DWARF3: DW_AT_location [DW_FORM_data4] (0x00000000
-; DWARF3-NEXT: {{.*}}: DW_OP_breg1 RDX+0, DW_OP_deref
+; DWARF3-NEXT: {{.*}}: DW_OP_breg1 RDX+0{{$}}
+; DWARF3-NEXT: {{.*}}: DW_OP_breg6 RBP-{{[0-9]+}}, DW_OP_deref)
; CHECK-NOT: DW_TAG
; CHECK: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000067] = "vla")
@@ -17,11 +19,13 @@
; Check the DEBUG_VALUE comments for good measure.
; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
; vla should have a register-indirect address at one point.
-; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] [$rdx+0]
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_deref] $rdx
+; vla ptr is spilt too, it should have a stack location,
+; ASM-CHECK: DEBUG_VALUE: vla <- [DW_OP_constu {{[0-9]+}}, DW_OP_minus, DW_OP_deref] [$rbp+0]
; ASM-CHECK: DW_OP_breg1
; RUN: llvm-as %s -o - | llvm-dis - | FileCheck %s --check-prefix=PRETTY-PRINT
-; PRETTY-PRINT: DIExpression(DW_OP_deref)
+; PRETTY-PRINT: DIExpression()
define void @testVLAwithSize(i32 %s) nounwind uwtable ssp !dbg !5 {
entry:
@@ -104,4 +108,4 @@ declare void @llvm.stackrestore(i8*) nou
!27 = !DILocation(line: 8, column: 1, scope: !13)
!28 = !DIFile(filename: "bar.c", directory: "/Users/echristo/tmp")
!29 = !{i32 1, !"Debug Info Version", i32 3}
-!30 = !DIExpression(DW_OP_deref)
+!30 = !DIExpression()
Modified: llvm/trunk/test/DebugInfo/X86/parameters.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/parameters.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/parameters.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/parameters.ll Tue Oct 15 03:46:24 2019
@@ -28,7 +28,7 @@
; CHECK: DW_AT_name{{.*}} = "func"
; CHECK: DW_TAG_formal_parameter
; CHECK: DW_AT_location {{.*}}
-; CHECK-NEXT: DW_OP_breg4 RSI+0, DW_OP_deref
+; CHECK-NEXT: DW_OP_breg4 RSI+0)
; CHECK-NOT: DW_TAG
; CHECK: DW_AT_name{{.*}} = "f"
@@ -38,8 +38,8 @@
; CHECK: DW_AT_location{{.*}}(DW_OP_fbreg +23)
; CHECK: DW_TAG_formal_parameter
; CHECK: DW_AT_location{{.*}}(
-; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0, DW_OP_deref
-; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref, DW_OP_deref)
+; CHECK-NEXT: {{.*}}: DW_OP_breg4 RSI+0{{$}}
+; CHECK-NEXT: {{.*}}: DW_OP_breg7 RSP+8, DW_OP_deref)
; CHECK-NOT: DW_TAG
; CHECK: DW_AT_name{{.*}} = "g"
@@ -48,7 +48,7 @@
; Function Attrs: uwtable
define void @_ZN7pr147634funcENS_3fooE(%"struct.pr14763::foo"* noalias sret %agg.result, %"struct.pr14763::foo"* %f) #0 !dbg !4 {
entry:
- call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !DIExpression(DW_OP_deref)), !dbg !24
+ call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %f, metadata !22, metadata !DIExpression()), !dbg !24
call void @_ZN7pr147633fooC1ERKS0_(%"struct.pr14763::foo"* %agg.result, %"struct.pr14763::foo"* %f), !dbg !25
ret void, !dbg !25
}
@@ -65,7 +65,7 @@ entry:
%frombool = zext i1 %b to i8
store i8 %frombool, i8* %b.addr, align 1
call void @llvm.dbg.declare(metadata i8* %b.addr, metadata !26, metadata !DIExpression()), !dbg !27
- call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !DIExpression(DW_OP_deref)), !dbg !27
+ call void @llvm.dbg.declare(metadata %"struct.pr14763::foo"* %g, metadata !28, metadata !DIExpression()), !dbg !27
%0 = load i8, i8* %b.addr, align 1, !dbg !29
%tobool = trunc i8 %0 to i1, !dbg !29
br i1 %tobool, label %if.then, label %if.end, !dbg !29
Modified: llvm/trunk/test/DebugInfo/X86/safestack-byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/safestack-byval.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/safestack-byval.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/safestack-byval.ll Tue Oct 15 03:46:24 2019
@@ -14,7 +14,7 @@
; }
; CHECK: ![[ZZZ:.*]] = !DILocalVariable(name: "zzz",
-; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], !DIExpression(DW_OP_deref, DW_OP_constu, 400, DW_OP_minus)
+; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], !DIExpression(DW_OP_constu, 400, DW_OP_minus, DW_OP_deref)
%struct.S = type { [100 x i32] }
@@ -78,7 +78,7 @@ attributes #2 = { argmemonly nounwind }
!20 = !{i32 2, !"Debug Info Version", i32 3}
!21 = !{!"clang version 3.8.0 (trunk 254107) (llvm/trunk 254109)"}
!22 = !DILocation(line: 8, column: 9, scope: !12)
-!23 = !DIExpression(DW_OP_deref, DW_OP_constu, 400, DW_OP_minus)
+!23 = !DIExpression(DW_OP_constu, 400, DW_OP_minus)
!24 = !DILocation(line: 8, column: 28, scope: !12)
!25 = !DIExpression()
!26 = !DILocation(line: 9, column: 10, scope: !12)
Modified: llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-indirect-nrvo.ll Tue Oct 15 03:46:24 2019
@@ -21,7 +21,7 @@
; }
; CHECK-LABEL: _Z10get_stringv:
-; CHECK: #DEBUG_VALUE: get_string:result <- [$rdi+0]
+; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_deref] $rdi
; CHECK: movq %rdi, [[OFFS:[0-9]+]](%rsp) # 8-byte Spill
; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [$rsp+0]
; CHECK: callq _ZN6stringC1Ei
Modified: llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/spill-nontrivial-param.ll Tue Oct 15 03:46:24 2019
@@ -20,7 +20,7 @@
; }
; CHECK-LABEL: _Z3foo10NonTrivial:
-; CHECK: #DEBUG_VALUE: foo:nt <- [$rdi+0]
+; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_deref] $rdi
; CHECK: movq %rdi, -8(%rsp) # 8-byte Spill
; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [$rsp+0]
; CHECK: #APP
Modified: llvm/trunk/test/DebugInfo/X86/vla.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/vla.ll?rev=374877&r1=374876&r2=374877&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/vla.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/vla.ll Tue Oct 15 03:46:24 2019
@@ -1,7 +1,21 @@
; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=obj %s -o - | llvm-dwarfdump - --name=a | FileCheck --check-prefix=OBJFILE %s
+; REQUIRES: object-emission
+;
; Ensure that we generate an indirect location for the variable length array a.
-; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] [{{\$r[a-z]+}}+0]
+;
+; CHECK: ##DEBUG_VALUE: vla:a <- [DW_OP_deref] {{\$r[a-z]+}}
; CHECK: DW_OP_breg{{[0-9]}}
+;
+; Ensure there's only one level of indirection in the vla location -- it should
+; be a memory location. Base register can be any allocatable one; variables are
+; filtered by --name arg to llvm-dwarfdump.
+;
+; OBJFILE: DW_TAG_variable
+; OBJFILE: DW_AT_location
+; OBJFILE-NEXT: ): DW_OP_breg{{[0-9]+}} R{{[0-9A-Z]+}}+0)
+; OBJFILE: DW_AT_name ("a")
+;
; rdar://problem/13658587
;
; generated from:
@@ -33,7 +47,7 @@ entry:
%2 = call i8* @llvm.stacksave(), !dbg !17
store i8* %2, i8** %saved_stack, !dbg !17
%vla = alloca i32, i64 %1, align 16, !dbg !17
- call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !DIExpression(DW_OP_deref)), !dbg !17
+ call void @llvm.dbg.declare(metadata i32* %vla, metadata !18, metadata !DIExpression()), !dbg !17
%arrayidx = getelementptr inbounds i32, i32* %vla, i64 0, !dbg !22
store i32 42, i32* %arrayidx, align 4, !dbg !22
%3 = load i32, i32* %n.addr, align 4, !dbg !23
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