[PATCH] D68814: [LV] Allow assume calls in predicated blocks.

[Ayal Zaks via Phabricator via llvm-commits]

Ayal added a comment.

If conditional assumes are to be dropped, better do so on entry to VPlan, as in DeadInstructions, rather than representing them in ReplicateRecipe (as do unconditional assumes) and silencing their code generation.

To retain conditional assumes along with their control flow, they could be marked under isScalarWithPredication; but this complicates vectorization, plus what use are such assumes when all else is if-converted(?)

Conditional assumes under uniform control flow could be retained, along with the uniform control flow they depend upon; this may be mostly relevant for outerloop vectorization.


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  https://reviews.llvm.org/D68814/new/

https://reviews.llvm.org/D68814