[PATCH] D68905: [update_mir_test_checks] Handle MI flags properly

Roman Tereshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 11 23:07:17 PDT 2019


rtereshin created this revision.
rtereshin added a reviewer: bogner.
Herald added subscribers: llvm-commits, Petar.Avramovic, atanasyan, jrtc27, nhaehnle, jvesely, sdardis.
Herald added a project: LLVM.

previously we would generate literal check lines w/o no reg-exps for
vregs as MI flags (nsw, ninf, etc.) won't be recognized as a part of MI.

Fixing that. Includes updating the MIR tests that suffered from the
problem.


Repository:
  rL LLVM

https://reviews.llvm.org/D68905

Files:
  test/CodeGen/AArch64/GlobalISel/legalize-dyn-alloca.mir
  test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir
  test/CodeGen/AArch64/GlobalISel/regbank-fma.mir
  test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
  test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
  test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
  utils/update_mir_test_checks.py

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