[PATCH] D68893: AMDGPU: Split flat offsets that don't fit in DAG

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 11 14:59:25 PDT 2019


arsenm created this revision.
arsenm added reviewers: rampitec, vpykhtin.
Herald added subscribers: jfb, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.

We handle it this way for some other address spaces.

     

Since r349196, SILoadStoreOptimizer has been trying to do this. This
is after SIFoldOperands runs, which can change the addressing
patterns. It's simpler to just split this earlier.


https://reviews.llvm.org/D68893

Files:
  lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  test/CodeGen/AMDGPU/cgp-addressing-modes.ll
  test/CodeGen/AMDGPU/flat-address-space.ll
  test/CodeGen/AMDGPU/global-saddr.ll
  test/CodeGen/AMDGPU/global_atomics.ll
  test/CodeGen/AMDGPU/global_atomics_i64.ll
  test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  test/CodeGen/AMDGPU/store-hi16.ll

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