[PATCH] D68350: [AMDGPU][MC][GFX9][GFX10] Corrected parsing of optional operands
Dmitry Preobrazhensky via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 11 07:08:34 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rG882c3e3db52d: [AMDGPU][MC] Corrected parsing of optional operands (authored by dp).
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
Changed prior to commit:
https://reviews.llvm.org/D68350?vs=222884&id=224589#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68350/new/
https://reviews.llvm.org/D68350
Files:
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/test/MC/AMDGPU/flat-global.s
Index: llvm/test/MC/AMDGPU/flat-global.s
===================================================================
--- llvm/test/MC/AMDGPU/flat-global.s
+++ llvm/test/MC/AMDGPU/flat-global.s
@@ -526,3 +526,8 @@
// GFX10: encoding: [0x00,0x80,0x6c,0xdc,0x03,0x01,0x7d,0x00]
// GFX9: global_store_short_d16_hi v[3:4], v1, off ; encoding: [0x00,0x80,0x6c,0xdc,0x03,0x01,0x7f,0x00]
// VI-ERR: instruction not supported on this GPU
+
+global_atomic_add v0, v[1:2], v2, off glc slc
+// GFX10: global_atomic_add v0, v[1:2], v2, off glc slc ; encoding: [0x00,0x80,0xcb,0xdc,0x01,0x02,0x7d,0x00]
+// GFX9: global_atomic_add v0, v[1:2], v2, off glc slc ; encoding: [0x00,0x80,0x0b,0xdd,0x01,0x02,0x7f,0x00]
+// VI-ERR: error: invalid operand for instruction
Index: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -6074,8 +6074,6 @@
};
OperandMatchResultTy AMDGPUAsmParser::parseOptionalOperand(OperandVector &Operands) {
- unsigned size = Operands.size();
- assert(size > 0);
OperandMatchResultTy res = parseOptionalOpr(Operands);
@@ -6090,17 +6088,13 @@
// to make sure autogenerated parser of custom operands never hit hardcoded
// mandatory operands.
- if (size == 1 || ((AMDGPUOperand &)*Operands[size - 1]).isRegKind()) {
-
- // We have parsed the first optional operand.
- // Parse as many operands as necessary to skip all mandatory operands.
+ for (unsigned i = 0; i < MAX_OPR_LOOKAHEAD; ++i) {
+ if (res != MatchOperand_Success ||
+ isToken(AsmToken::EndOfStatement))
+ break;
- for (unsigned i = 0; i < MAX_OPR_LOOKAHEAD; ++i) {
- if (res != MatchOperand_Success ||
- getLexer().is(AsmToken::EndOfStatement)) break;
- if (getLexer().is(AsmToken::Comma)) Parser.Lex();
- res = parseOptionalOpr(Operands);
- }
+ trySkipToken(AsmToken::Comma);
+ res = parseOptionalOpr(Operands);
}
return res;
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