[PATCH] D56005: [RFC] [LLVM] Allocatable Global Register Variables for ARM

[Carey Williams via Phabricator via llvm-commits]

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Superseded by https://reviews.llvm.org/D68862.



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Comment at: lib/Target/ARM/ARMSubtarget.h:722
+    if (i == 9 && isTargetMachO() && !HasV6Ops) {
+      return true;
+    }
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efriedma wrote:
> Can we handle this in initSubtargetFeatures instead, like we do for rwpi?  It's sort of confusing to follow.
I'm not quite sure what you mean. This is just a convenience function for checking which registers have been reserved. We're not actually setting the reservations here, that's handled by the ARM.td/reserve-rN rule(s).

r9 could be reserved either with ffixed-r9/reserve-r9 or with -frwpi, the second case being handled in initTargetSubFeatures.
For the other GPRs we only have the ffixed options, so there is no need.

Am I misunderstanding?


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https://reviews.llvm.org/D56005