[PATCH] D66210: [RISCV] Enable the machine outliner for RISC-V

[Lewis Revill via Phabricator via llvm-commits]

lewis-revill added a comment.

In D66210#1699653 <https://reviews.llvm.org/D66210#1699653>, @lewis-revill wrote:

> Rebased prior to commit; Will run this through the testsuite once more first.


I'm seeing some excess failures from this. However, the failures I've looked into so far seem to be timeouts from compilation being too slow. I'll hold off on committing until I've triaged all of them.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D66210/new/

https://reviews.llvm.org/D66210