[llvm] r374283 - [X86] Add test case for trunc_packus_v16i32_v16i8 with avx512vl+avx512bw and prefer-vector-width=256 and min-legal-vector-width=256. NFC

[Craig Topper via llvm-commits]

Author: ctopper
Date: Wed Oct  9 23:25:00 2019
New Revision: 374283

URL: http://llvm.org/viewvc/llvm-project?rev=374283&view=rev
Log:
[X86] Add test case for trunc_packus_v16i32_v16i8 with avx512vl+avx512bw and prefer-vector-width=256 and min-legal-vector-width=256. NFC

Modified:
    llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll

Modified: llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll?rev=374283&r1=374282&r2=374283&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll (original)
+++ llvm/trunk/test/CodeGen/X86/min-legal-vector-width.ll Wed Oct  9 23:25:00 2019
@@ -1079,3 +1079,23 @@ define void @vselect_split_v16i16_setcc(
   store <16 x i32> %b, <16 x i32>* %r
   ret void
 }
+
+define <16 x i8> @trunc_packus_v16i32_v16i8(<16 x i32>* %p, <16 x i8>* %q) "min-legal-vector-width"="256" {
+; CHECK-LABEL: trunc_packus_v16i32_v16i8:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpxor %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    vpmaxsd 32(%rdi), %ymm0, %ymm1
+; CHECK-NEXT:    vpmovusdb %ymm1, %xmm1
+; CHECK-NEXT:    vpmaxsd (%rdi), %ymm0, %ymm0
+; CHECK-NEXT:    vpmovusdb %ymm0, %xmm0
+; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; CHECK-NEXT:    vzeroupper
+; CHECK-NEXT:    retq
+  %a = load <16 x i32>, <16 x i32>* %p
+  %b = icmp slt <16 x i32> %a, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
+  %c = select <16 x i1> %b, <16 x i32> %a, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
+  %d = icmp sgt <16 x i32> %c, zeroinitializer
+  %e = select <16 x i1> %d, <16 x i32> %c, <16 x i32> zeroinitializer
+  %f = trunc <16 x i32> %e to <16 x i8>
+  ret <16 x i8> %f
+}