[PATCH] D68092: [AMDGPU] Invert the handling of skip insertion.
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 8 10:09:04 PDT 2019
cdevadas marked 3 inline comments as done.
cdevadas added inline comments.
================
Comment at: lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp:112
+
+ TII->analyzeBranch(SrcMBB, TrueMBB, FalseMBB, Cond);
+ if (!FalseMBB)
----------------
nhaehnle wrote:
> analyzeBranch's return value must be checked.
Sure. Will add that.
================
Comment at: lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp:116-117
+
+ if (MDT->dominates(TrueMBB, &SrcMBB) ||
+ mustRetainExeczBranch(*FalseMBB, *TrueMBB))
+ return false;
----------------
nhaehnle wrote:
> What's the logic here behind using domination as a criterion?
There could be a situation in which execnz (inserted during SI_LOOP lowering) can be inverted to execz by an optimization (for instance, BranchFolding). This execz should always be retained. This special check is added to handle it.
Unfortunately, I couldn't write/find a test-case to reproduce it.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68092/new/
https://reviews.llvm.org/D68092
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