[PATCH] D68232: [DAGCombine] Match a greater range of rotate when not all bits are demanded.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix updated this revision to Diff 223844.
deadalnix added a comment.

Add test for vector - but nothing changes for them (see rL374043 <https://reviews.llvm.org/rL374043> ) and use isSubsetOf and getAllOnesValue.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68232/new/

https://reviews.llvm.org/D68232

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/rot16.ll

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