[llvm] r373960 - [InstCombine] dropRedundantMaskingOfLeftShiftInput(): propagate undef shift amounts
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 7 13:52:53 PDT 2019
Author: lebedevri
Date: Mon Oct 7 13:52:52 2019
New Revision: 373960
URL: http://llvm.org/viewvc/llvm-project?rev=373960&view=rev
Log:
[InstCombine] dropRedundantMaskingOfLeftShiftInput(): propagate undef shift amounts
Summary:
When we do `ConstantExpr::getZExt()`, that "extends" `undef` to `0`,
which means that for patterns a/b we'd assume that we must not produce
any bits for that channel, while in reality we simply didn't care
about that channel - i.e. we don't need to mask it.
Reviewers: spatel
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68239
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll
llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineShifts.cpp Mon Oct 7 13:52:52 2019
@@ -117,6 +117,24 @@ reassociateShiftAmtsOfTwoSameDirectionSh
return Ret;
}
+// Try to replace `undef` constants in C with Replacement.
+static Constant *replaceUndefsWith(Constant *C, Constant *Replacement) {
+ if (C && match(C, m_Undef()))
+ return Replacement;
+
+ if (auto *CV = dyn_cast<ConstantVector>(C)) {
+ llvm::SmallVector<Constant *, 32> NewOps(CV->getNumOperands());
+ for (unsigned i = 0, NumElts = NewOps.size(); i != NumElts; ++i) {
+ Constant *EltC = CV->getOperand(i);
+ NewOps[i] = EltC && match(EltC, m_Undef()) ? Replacement : EltC;
+ }
+ return ConstantVector::get(NewOps);
+ }
+
+ // Don't know how to deal with this constant.
+ return C;
+}
+
// If we have some pattern that leaves only some low bits set, and then performs
// left-shift of those bits, if none of the bits that are left after the final
// shift are modified by the mask, we can omit the mask.
@@ -177,6 +195,14 @@ dropRedundantMaskingOfLeftShiftInput(Bin
// The mask must be computed in a type twice as wide to ensure
// that no bits are lost if the sum-of-shifts is wider than the base type.
Type *ExtendedTy = Ty->getExtendedType();
+ // An extend of an undef value becomes zero because the high bits are
+ // never completely unknown. Replace the the `undef` shift amounts with
+ // final shift bitwidth to ensure that the value remains undef when
+ // creating the subsequent shift op.
+ SumOfShAmts = replaceUndefsWith(
+ SumOfShAmts,
+ ConstantInt::get(SumOfShAmts->getType()->getScalarType(),
+ ExtendedTy->getScalarType()->getScalarSizeInBits()));
auto *ExtendedSumOfShAmts =
ConstantExpr::getZExt(SumOfShAmts, ExtendedTy);
// And compute the mask as usual: ~(-1 << (SumOfShAmts))
@@ -212,6 +238,13 @@ dropRedundantMaskingOfLeftShiftInput(Bin
// The mask must be computed in a type twice as wide to ensure
// that no bits are lost if the sum-of-shifts is wider than the base type.
Type *ExtendedTy = Ty->getExtendedType();
+ // An extend of an undef value becomes zero because the high bits are
+ // never completely unknown. Replace the the `undef` shift amounts with
+ // negated shift bitwidth to ensure that the value remains undef when
+ // creating the subsequent shift op.
+ ShAmtsDiff = replaceUndefsWith(
+ ShAmtsDiff,
+ ConstantInt::get(ShAmtsDiff->getType()->getScalarType(), -BitWidth));
auto *ExtendedNumHighBitsToClear = ConstantExpr::getZExt(
ConstantExpr::getAdd(
ConstantExpr::getNeg(ShAmtsDiff),
Modified: llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-a.ll Mon Oct 7 13:52:52 2019
@@ -82,7 +82,7 @@ define <8 x i32> @t1_vec_splat_undef(<8
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T4]]
-; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 0, i32 2147483647>
+; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
; CHECK-NEXT: ret <8 x i32> [[T5]]
;
%t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>
Modified: llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-b.ll Mon Oct 7 13:52:52 2019
@@ -82,7 +82,7 @@ define <8 x i32> @t1_vec_splat_undef(<8
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T4]])
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T4]]
-; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 0, i32 2147483647>
+; CHECK-NEXT: [[T5:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
; CHECK-NEXT: ret <8 x i32> [[T5]]
;
%t0 = add <8 x i32> %nbits, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>
Modified: llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-c.ll Mon Oct 7 13:52:52 2019
@@ -62,7 +62,7 @@ define <8 x i32> @t1_vec_splat_undef(<8
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T0]])
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T2]]
-; CHECK-NEXT: [[T3:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 -1, i32 2147483647>
+; CHECK-NEXT: [[T3:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
; CHECK-NEXT: ret <8 x i32> [[T3]]
;
%t0 = lshr <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>, %nbits
Modified: llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-d.ll Mon Oct 7 13:52:52 2019
@@ -72,7 +72,7 @@ define <8 x i32> @t2_vec_splat_undef(<8
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T1]])
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T3]])
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X:%.*]], [[T3]]
-; CHECK-NEXT: [[T4:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 -1, i32 2147483647>
+; CHECK-NEXT: [[T4:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
; CHECK-NEXT: ret <8 x i32> [[T4]]
;
%t0 = shl <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 undef, i32 -1>, %nbits
Modified: llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll?rev=373960&r1=373959&r2=373960&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/partally-redundant-left-shift-input-masking-variant-e.ll Mon Oct 7 13:52:52 2019
@@ -62,7 +62,7 @@ define <8 x i32> @t1_vec_splat_undef(<8
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T0]])
; CHECK-NEXT: call void @use8xi32(<8 x i32> [[T2]])
; CHECK-NEXT: [[TMP1:%.*]] = shl <8 x i32> [[X]], [[T2]]
-; CHECK-NEXT: [[T3:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 -1, i32 2147483647>
+; CHECK-NEXT: [[T3:%.*]] = and <8 x i32> [[TMP1]], <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647, i32 undef, i32 2147483647>
; CHECK-NEXT: ret <8 x i32> [[T3]]
;
%t0 = shl <8 x i32> %x, %nbits
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