[PATCH] D68582: GlobalISel: Add target pre-isel instructions

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: aemerson, aditya_nandakumar, paquette, dsanders, qcolombet.
Herald added subscribers: Petar.Avramovic, volkan, rovka, nhaehnle, wdng, jvesely.

Allows targets to introduce regbankselectable
pseudo-instructions. Currently the closet feature to this is an
intrinsic. However this requires creating a public intrinsic
declaration. This litters the public intrinsic namespace with
operations we don't necessarily want to expose to IR producers, and
would rather leave as private to the backend.

      

Use a new instruction bit. A previous attempt tried to keep using enum
value ranges, but it turned into a mess.


https://reviews.llvm.org/D68582

Files:
  include/llvm/CodeGen/MachineInstr.h
  include/llvm/MC/MCInstrDesc.h
  include/llvm/Target/GenericOpcodes.td
  include/llvm/Target/Target.td
  lib/CodeGen/GlobalISel/RegBankSelect.cpp
  lib/Target/AMDGPU/AMDGPUGISel.td
  lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstructions.td
  test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
  test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
  utils/TableGen/CodeGenInstruction.cpp
  utils/TableGen/CodeGenInstruction.h
  utils/TableGen/InstrInfoEmitter.cpp

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