[PATCH] D68428: [X86] Add custom type legalization for v16i64->v16i8 truncate and v8i64->v8i8 truncate when v8i64 isn't legal

[Craig Topper via Phabricator via llvm-commits]

craig.topper marked an inline comment as done.
craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/X86/min-legal-vector-width.ll:836
+; CHECK-NEXT:    vpmovqb %ymm0, %xmm0
+; CHECK-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; CHECK-NEXT:    vzeroupper
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RKSimon wrote:
> craig.topper wrote:
> > The loss of the VPERMI2B here is a regression, but the VTRUNC form should allow us to create saturating VTRUNCs for the cases in vector-trunc-ssat.ll and vector-trunc-usat.ll. So maybe we need a late shuffle combine to VPERMI2B?
> We don't currently support VTRUNC in shuffle combining as we're still weak at handling conflicting vector sizes - is that limitation ok for now?
I think so. We've only started shipping CPUs that support VPERMI2B last month I think so they aren't very widespread yet. If it becomes a problem we can probably match this specific pattern in a DAG combine. I'll open a bugzilla when this patch lands.


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https://reviews.llvm.org/D68428