[llvm] r373762 - [ModuloSchedule] Do not remap terminators

[James Molloy via llvm-commits]

Author: jamesm
Date: Fri Oct  4 10:15:25 2019
New Revision: 373762

URL: http://llvm.org/viewvc/llvm-project?rev=373762&view=rev
Log:
[ModuloSchedule] Do not remap terminators

This is a trivial point fix. Terminator instructions aren't scheduled, so
we shouldn't expect to be able to remap them.

This doesn't affect Hexagon and PPC because their terminators are always
hardware loop backbranches that have no register operands.

Modified:
    llvm/trunk/lib/CodeGen/ModuloSchedule.cpp

Modified: llvm/trunk/lib/CodeGen/ModuloSchedule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ModuloSchedule.cpp?rev=373762&r1=373761&r2=373762&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/ModuloSchedule.cpp (original)
+++ llvm/trunk/lib/CodeGen/ModuloSchedule.cpp Fri Oct  4 10:15:25 2019
@@ -1314,7 +1314,7 @@ void KernelRewriter::rewrite() {
 
   // Now remap every instruction in the loop.
   for (MachineInstr &MI : *BB) {
-    if (MI.isPHI())
+    if (MI.isPHI() || MI.isTerminator())
       continue;
     for (MachineOperand &MO : MI.uses()) {
       if (!MO.isReg() || MO.getReg().isPhysical() || MO.isImplicit())