[PATCH] D68457: [X86] Enable AVX512BW and AVX512VL for memcmp

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 4 09:59:08 PDT 2019


craig.topper added inline comments.


================
Comment at: test/CodeGen/X86/memcmp.ll:1015
+; X64-AVX512BW-NEXT:    vmovdqu (%rdi), %xmm0
+; X64-AVX512BW-NEXT:    vpcmpeqb (%rsi), %xmm0, %k0
+; X64-AVX512BW-NEXT:    kortestw %k0, %k0
----------------
I'm not sure this is better than the avx code. vpcmpeq to mask register and kortest are both 3 cycle latency. The vpcmpb to xmm is 1 cyc. vpmovmskb is 1 cyc and cmpl is 1 cyc.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68457/new/

https://reviews.llvm.org/D68457





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