[llvm] r373715 - AMDGPU/GlobalISel: Select G_PTRTOINT

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Fri Oct  4 01:35:37 2019
New Revision: 373715

URL: http://llvm.org/viewvc/llvm-project?rev=373715&view=rev
Log:
AMDGPU/GlobalISel: Select G_PTRTOINT

Added:
    llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
Modified:
    llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp?rev=373715&r1=373714&r2=373715&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp Fri Oct  4 01:35:37 2019
@@ -1670,6 +1670,7 @@ bool AMDGPUInstructionSelector::select(M
     return selectG_UADDO_USUBO(I);
   case TargetOpcode::G_INTTOPTR:
   case TargetOpcode::G_BITCAST:
+  case TargetOpcode::G_PTRTOINT:
     return selectCOPY(I);
   case TargetOpcode::G_CONSTANT:
   case TargetOpcode::G_FCONSTANT:

Added: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir?rev=373715&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrtoint.mir Fri Oct  4 01:35:37 2019
@@ -0,0 +1,101 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
+---
+
+name: ptrtoint_s_p3_to_s_s32
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: ptrtoint_s_p3_to_s_s32
+    ; CHECK: liveins: $sgpr0
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
+    ; CHECK: S_ENDPGM 0, implicit [[COPY]]
+    %0:sgpr(p3) = COPY $sgpr0
+    %1:sgpr(s32) = G_PTRTOINT %0
+    S_ENDPGM 0, implicit %1
+...
+
+---
+
+name: ptrtoint_s_p5_to_s_s32
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0
+
+    ; CHECK-LABEL: name: ptrtoint_s_p5_to_s_s32
+    ; CHECK: liveins: $sgpr0
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
+    ; CHECK: S_ENDPGM 0, implicit [[COPY]]
+    %0:sgpr(p5) = COPY $sgpr0
+    %1:sgpr(s32) = G_PTRTOINT %0
+    S_ENDPGM 0, implicit %1
+...
+
+---
+
+name: ptrtoint_s_p0_to_s_s64
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+
+    ; CHECK-LABEL: name: ptrtoint_s_p0_to_s_s64
+    ; CHECK: liveins: $sgpr0_sgpr1
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
+    ; CHECK: S_ENDPGM 0, implicit [[COPY]]
+    %0:sgpr(p0) = COPY $sgpr0_sgpr1
+    %1:sgpr(s64) = G_PTRTOINT %0
+    S_ENDPGM 0, implicit %1
+...
+
+---
+
+name: ptrtoint_s_p1_to_s_s64
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+
+    ; CHECK-LABEL: name: ptrtoint_s_p1_to_s_s64
+    ; CHECK: liveins: $sgpr0_sgpr1
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
+    ; CHECK: S_ENDPGM 0, implicit [[COPY]]
+    %0:sgpr(p1) = COPY $sgpr0_sgpr1
+    %1:sgpr(s64) = G_PTRTOINT %0
+    S_ENDPGM 0, implicit %1
+...
+
+---
+
+name: ptrtoint_s_p999_to_s_s64
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+  bb.0:
+    liveins: $sgpr0_sgpr1
+
+    ; CHECK-LABEL: name: ptrtoint_s_p999_to_s_s64
+    ; CHECK: liveins: $sgpr0_sgpr1
+    ; CHECK: [[COPY:%[0-9]+]]:sreg_64_xexec = COPY $sgpr0_sgpr1
+    ; CHECK: S_ENDPGM 0, implicit [[COPY]]
+    %0:sgpr(p999) = COPY $sgpr0_sgpr1
+    %1:sgpr(s64) = G_PTRTOINT %0
+    S_ENDPGM 0, implicit %1
+...