[llvm] r373652 - [PowerPC] Adjust the naming and operand order of fnmsub patterns
Jinsong Ji via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 3 12:36:42 PDT 2019
Author: jsji
Date: Thu Oct 3 12:36:42 2019
New Revision: 373652
URL: http://llvm.org/viewvc/llvm-project?rev=373652&view=rev
Log:
[PowerPC] Adjust the naming and operand order of fnmsub patterns
Summary:
This is follow up patch of https://reviews.llvm.org/D67595.
Adjust naming and the Commutable operands for additional patterns
to make it easier to read.
The testcase update also show that we can save some unecessary fmr as
well.
Reviewers: #powerpc, steven.zhang, hfinkel, nemanjai
Reviewed By: #powerpc, nemanjai
Subscribers: wuzish, hiraditya, kbarton, MaskRay, shchenz, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68112
Modified:
llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
llvm/trunk/test/CodeGen/PowerPC/combine-fneg.ll
llvm/trunk/test/CodeGen/PowerPC/f128-fma.ll
llvm/trunk/test/CodeGen/PowerPC/fma-assoc.ll
llvm/trunk/test/CodeGen/PowerPC/fma-ext.ll
llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll
Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrVSX.td Thu Oct 3 12:36:42 2019
@@ -1011,21 +1011,21 @@ def : Pat<(f64 (extractelt v2f64:$S, 1))
(f64 (EXTRACT_SUBREG $S, sub_64))>;
}
-// Additional fnmsub patterns: -a*c + b == -(a*c - b)
-def : Pat<(fma (fneg f64:$A), f64:$C, f64:$B),
- (XSNMSUBADP $B, $C, $A)>;
-def : Pat<(fma f64:$A, (fneg f64:$C), f64:$B),
- (XSNMSUBADP $B, $C, $A)>;
-
-def : Pat<(fma (fneg v2f64:$A), v2f64:$C, v2f64:$B),
- (XVNMSUBADP $B, $C, $A)>;
-def : Pat<(fma v2f64:$A, (fneg v2f64:$C), v2f64:$B),
- (XVNMSUBADP $B, $C, $A)>;
-
-def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
- (XVNMSUBASP $B, $C, $A)>;
-def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
- (XVNMSUBASP $B, $C, $A)>;
+// Additional fnmsub patterns: -a*b + c == -(a*b - c)
+def : Pat<(fma (fneg f64:$A), f64:$B, f64:$C),
+ (XSNMSUBADP $C, $A, $B)>;
+def : Pat<(fma f64:$A, (fneg f64:$B), f64:$C),
+ (XSNMSUBADP $C, $A, $B)>;
+
+def : Pat<(fma (fneg v2f64:$A), v2f64:$B, v2f64:$C),
+ (XVNMSUBADP $C, $A, $B)>;
+def : Pat<(fma v2f64:$A, (fneg v2f64:$B), v2f64:$C),
+ (XVNMSUBADP $C, $A, $B)>;
+
+def : Pat<(fma (fneg v4f32:$A), v4f32:$B, v4f32:$C),
+ (XVNMSUBASP $C, $A, $B)>;
+def : Pat<(fma v4f32:$A, (fneg v4f32:$B), v4f32:$C),
+ (XVNMSUBASP $C, $A, $B)>;
def : Pat<(v2f64 (bitconvert v4f32:$A)),
(COPY_TO_REGCLASS $A, VSRC)>;
@@ -2656,9 +2656,9 @@ let AddedComplexity = 400, Predicates =
(fneg (int_ppc_fmaf128_round_to_odd
f128:$vA, f128:$vB, (fneg f128:$vTi))))]>;
- // Additional fnmsub patterns: -a*c + b == -(a*c - b)
- def : Pat<(fma (fneg f128:$A), f128:$C, f128:$B), (XSNMSUBQP $B, $C, $A)>;
- def : Pat<(fma f128:$A, (fneg f128:$C), f128:$B), (XSNMSUBQP $B, $C, $A)>;
+ // Additional fnmsub patterns: -a*b + c == -(a*b - c)
+ def : Pat<(fma (fneg f128:$A), f128:$B, f128:$C), (XSNMSUBQP $C, $A, $B)>;
+ def : Pat<(fma f128:$A, (fneg f128:$B), f128:$C), (XSNMSUBQP $C, $A, $B)>;
//===--------------------------------------------------------------------===//
// Quad/Double-Precision Compare Instructions:
Modified: llvm/trunk/test/CodeGen/PowerPC/combine-fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/combine-fneg.ll?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/combine-fneg.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/combine-fneg.ll Thu Oct 3 12:36:42 2019
@@ -14,7 +14,7 @@ define <4 x double> @fneg_fdiv_splat(dou
; CHECK-NEXT: xvredp 2, 0
; CHECK-NEXT: addi 3, 3, .LCPI0_1 at toc@l
; CHECK-NEXT: xxswapd 1, 1
-; CHECK-NEXT: xvnmsubadp 1, 2, 0
+; CHECK-NEXT: xvnmsubadp 1, 0, 2
; CHECK-NEXT: xvmaddadp 2, 2, 1
; CHECK-NEXT: lxvd2x 1, 0, 3
; CHECK-NEXT: xxswapd 1, 1
Modified: llvm/trunk/test/CodeGen/PowerPC/f128-fma.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/f128-fma.ll?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/f128-fma.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/f128-fma.ll Thu Oct 3 12:36:42 2019
@@ -129,7 +129,7 @@ entry:
; CHECK-DAG: lxv v[[REG3:[0-9]+]], 0(r3)
; CHECK-DAG: lxv v[[REG4:[0-9]+]], 0(r4)
; CHECK-DAG: lxv v[[REG5:[0-9]+]], 0(r5)
-; CHECK: xsnmsubqp v[[REG3]], v[[REG5]], v[[REG4]]
+; CHECK: xsnmsubqp v[[REG3]], v[[REG4]], v[[REG5]]
; CHECK-NEXT: stxv v[[REG3]], 0(r6)
; CHECK-NEXT: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/fma-assoc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fma-assoc.ll?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fma-assoc.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fma-assoc.ll Thu Oct 3 12:36:42 2019
@@ -260,7 +260,6 @@ define double @test_FMSUB_ASSOC_EXT3(flo
; CHECK-VSX-LABEL: test_FMSUB_ASSOC_EXT3:
; CHECK-VSX: xsnmsubmdp
; CHECK-VSX-NEXT: xsnmsubadp
-; CHECK-VSX-NEXT: fmr
; CHECK-VSX-NEXT: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/fma-ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/fma-ext.ll?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/fma-ext.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/fma-ext.ll Thu Oct 3 12:36:42 2019
@@ -54,7 +54,6 @@ define double @test_FMSUB_EXT2(float %A,
; CHECK-VSX-LABEL: test_FMSUB_EXT2:
; CHECK-VSX: xsnmsubmdp
-; CHECK-VSX-NEXT: fmr
; CHECK-VSX-NEXT: blr
}
Modified: llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll?rev=373652&r1=373651&r2=373652&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/repeated-fp-divisors.ll Thu Oct 3 12:36:42 2019
@@ -13,7 +13,7 @@ define <4 x float> @repeated_fp_divisor(
; CHECK-NEXT: lvx 4, 0, 3
; CHECK-NEXT: xxspltw 0, 0, 0
; CHECK-NEXT: xvresp 1, 0
-; CHECK-NEXT: xvnmsubasp 35, 1, 0
+; CHECK-NEXT: xvnmsubasp 35, 0, 1
; CHECK-NEXT: xvmulsp 0, 34, 36
; CHECK-NEXT: xvmaddasp 1, 1, 35
; CHECK-NEXT: xvmulsp 34, 0, 1
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