[llvm] r373591 - [mips] Push `fixup_Mips_LO16` fixup for `jialc` and `jic` instructions

Simon Atanasyan via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 3 05:08:26 PDT 2019


Author: atanasyan
Date: Thu Oct  3 05:08:26 2019
New Revision: 373591

URL: http://llvm.org/viewvc/llvm-project?rev=373591&view=rev
Log:
[mips] Push `fixup_Mips_LO16` fixup for `jialc` and `jic` instructions

Modified:
    llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
    llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
    llvm/trunk/test/MC/Mips/mips32r6/relocations.s
    llvm/trunk/test/MC/Mips/mips64r6/relocations.s

Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=373591&r1=373590&r2=373591&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Thu Oct  3 05:08:26 2019
@@ -485,8 +485,11 @@ getJumpOffset16OpValue(const MCInst &MI,
   assert(MO.isExpr() &&
          "getJumpOffset16OpValue expects only expressions or an immediate");
 
-   // TODO: Push fixup.
-   return 0;
+  const MCExpr *Expr = MO.getExpr();
+  Mips::Fixups FixupKind =
+      isMicroMips(STI) ? Mips::fixup_MICROMIPS_LO16 : Mips::fixup_Mips_LO16;
+  Fixups.push_back(MCFixup::create(0, Expr, MCFixupKind(FixupKind)));
+  return 0;
 }
 
 /// getJumpTargetOpValue - Return binary encoding of the jump

Modified: llvm/trunk/test/MC/Mips/micromips32r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips32r6/relocations.s?rev=373591&r1=373590&r2=373591&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips32r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/micromips32r6/relocations.s Thu Oct  3 05:08:26 2019
@@ -26,6 +26,12 @@
 # CHECK-FIXUP: bnezc $3, bar    # encoding: [0xa0,0b011AAAAA,A,A]
 # CHECK-FIXUP:                  #   fixup A - offset: 0,
 # CHECK-FIXUP:                      value: bar-4, kind: fixup_MICROMIPS_PC21_S1
+# CHECK-FIXUP: jialc $5, bar    # encoding: [0x80,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_MICROMIPS_LO16
+# CHECK-FIXUP: jic   $5, bar    # encoding: [0xa0,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_MICROMIPS_LO16
 #------------------------------------------------------------------------------
 # Check that the appropriate relocations were created.
 #------------------------------------------------------------------------------
@@ -37,6 +43,8 @@
 # CHECK-ELF:     0x10 R_MICROMIPS_PC19_S2 bar 0x0
 # CHECK-ELF:     0x14 R_MICROMIPS_PC21_S1 bar 0x0
 # CHECK-ELF:     0x18 R_MICROMIPS_PC21_S1 bar 0x0
+# CHECK-ELF:     0x1C R_MICROMIPS_LO16 bar 0x0
+# CHECK-ELF:     0x20 R_MICROMIPS_LO16 bar 0x0
 # CHECK-ELF: ]
 
   balc  bar
@@ -46,3 +54,5 @@
   lwpc    $2,bar
   beqzc  $3, bar
   bnezc  $3, bar
+  jialc  $5, bar
+  jic    $5, bar

Modified: llvm/trunk/test/MC/Mips/mips32r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips32r6/relocations.s?rev=373591&r1=373590&r2=373591&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips32r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/mips32r6/relocations.s Thu Oct  3 05:08:26 2019
@@ -40,6 +40,12 @@
 # CHECK-FIXUP: lwpc    $2, bar  # encoding: [0xec,0b01001AAA,A,A]
 # CHECK-FIXUP:                  #   fixup A - offset: 0,
 # CHECK-FIXUP:                      value: bar, kind: fixup_MIPS_PC19_S2
+# CHECK-FIXUP: jialc   $5, bar  # encoding: [0xf8,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_Mips_LO16
+# CHECK-FIXUP: jic     $5, bar  # encoding: [0xd8,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_Mips_LO16
 #------------------------------------------------------------------------------
 # Check that the appropriate relocations were created.
 #------------------------------------------------------------------------------
@@ -55,6 +61,8 @@
 # CHECK-ELF:     0x20 R_MIPS_PCLO16 bar 0x0
 # CHECK-ELF:     0x24 R_MIPS_PC19_S2 bar 0x0
 # CHECK-ELF:     0x28 R_MIPS_PC19_S2 bar 0x0
+# CHECK-ELF:     0x2C R_MIPS_LO16 bar 0x0
+# CHECK-ELF:     0x30 R_MIPS_LO16 bar 0x0
 # CHECK-ELF: ]
 
   addiupc   $2,bar
@@ -68,3 +76,5 @@
   addiu  $2, $2, %pcrel_lo(bar)
   lapc      $2,bar
   lwpc      $2,bar
+  jialc  $5, bar
+  jic    $5, bar

Modified: llvm/trunk/test/MC/Mips/mips64r6/relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips64r6/relocations.s?rev=373591&r1=373590&r2=373591&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips64r6/relocations.s (original)
+++ llvm/trunk/test/MC/Mips/mips64r6/relocations.s Thu Oct  3 05:08:26 2019
@@ -47,6 +47,12 @@
 # CHECK-FIXUP: lwupc   $2, bar  # encoding: [0xec,0b01010AAA,A,A]
 # CHECK-FIXUP:                  #   fixup A - offset: 0,
 # CHECK-FIXUP:                      value: bar, kind: fixup_MIPS_PC19_S2
+# CHECK-FIXUP: jialc   $5, bar  # encoding: [0xf8,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_Mips_LO16
+# CHECK-FIXUP: jic     $5, bar  # encoding: [0xd8,0x05,A,A]
+# CHECK-FIXUP:                  #   fixup A - offset: 0,
+# CHECK-FIXUP:                      value: bar, kind: fixup_Mips_LO16
 #------------------------------------------------------------------------------
 # Check that the appropriate relocations were created.
 #------------------------------------------------------------------------------
@@ -64,6 +70,8 @@
 # CHECK-ELF:     0x28 R_MIPS_PC18_S3/R_MIPS_NONE/R_MIPS_NONE bar 0x0
 # CHECK-ELF:     0x2C R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
 # CHECK-ELF:     0x30 R_MIPS_PC19_S2/R_MIPS_NONE/R_MIPS_NONE bar 0x0
+# CHECK-ELF:     0x34 R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE bar 0x0
+# CHECK-ELF:     0x38 R_MIPS_LO16/R_MIPS_NONE/R_MIPS_NONE bar 0x0
 # CHECK-ELF: ]
 
   addiupc   $2,bar
@@ -79,3 +87,5 @@
   ldpc  $2,bar
   lwpc  $2,bar
   lwupc $2,bar
+  jialc $5, bar
+  jic   $5, bar




More information about the llvm-commits mailing list