[llvm] r373568 - AMDGPU/GlobalISel: Don't re-get subtarget
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 2 22:46:10 PDT 2019
Author: arsenm
Date: Wed Oct 2 22:46:10 2019
New Revision: 373568
URL: http://llvm.org/viewvc/llvm-project?rev=373568&view=rev
Log:
AMDGPU/GlobalISel: Don't re-get subtarget
It's already available in the class.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp?rev=373568&r1=373567&r2=373568&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp Wed Oct 2 22:46:10 2019
@@ -662,9 +662,7 @@ bool AMDGPURegisterBankInfo::executeInWa
MachineInstr &MI,
MachineRegisterInfo &MRI,
ArrayRef<unsigned> OpIndices) const {
- MachineFunction *MF = MI.getParent()->getParent();
- const GCNSubtarget &ST = MF->getSubtarget<GCNSubtarget>();
- const SIInstrInfo *TII = ST.getInstrInfo();
+ MachineFunction *MF = &B.getMF();
MachineBasicBlock::iterator I(MI);
MachineBasicBlock &MBB = *MI.getParent();
@@ -2126,8 +2124,7 @@ AMDGPURegisterBankInfo::getInstrMapping(
return getDefaultMappingVOP(MI);
case AMDGPU::G_UMULH:
case AMDGPU::G_SMULH: {
- if (MF.getSubtarget<GCNSubtarget>().hasScalarMulHiInsts() &&
- isSALUMapping(MI))
+ if (Subtarget.hasScalarMulHiInsts() && isSALUMapping(MI))
return getDefaultMappingSOP(MI);
return getDefaultMappingVOP(MI);
}
@@ -2301,7 +2298,7 @@ AMDGPURegisterBankInfo::getInstrMapping(
Op3Bank == AMDGPU::SGPRRegBankID &&
(Size == 32 || (Size == 64 &&
(Pred == CmpInst::ICMP_EQ || Pred == CmpInst::ICMP_NE) &&
- MF.getSubtarget<GCNSubtarget>().hasScalarCompareEq64()));
+ Subtarget.hasScalarCompareEq64()));
unsigned Op0Bank = CanUseSCC ? AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID;
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