[PATCH] D68341: [AIX] TOC pseudo expansion for 64bit large + 64bit small + 32bit large modes

[Xiangling Liao via Phabricator via llvm-commits]

Xiangling_L created this revision.
Xiangling_L added reviewers: sfertile, hubert.reinterpretcast, jasonliu, cebowleratibm.
Xiangling_L added a project: LLVM.
Herald added subscribers: llvm-commits, jsji, MaskRay, kbarton, hiraditya, nemanjai.

On AIX, for toc-referenced globals,

1. under large code model, we generate:

[32 bit]
 LWZtocL(@sym, ADDIStocHA(%r2, @sym))
[64 bit]
LDtocL(@sym, ADDIStocHA8(%x2, @sym)).

2. under small code model, we generate:

[32 bit]
LWZtoc @op1, %r2
[64 bit]
LDtoc @op1, %x2

In this patch, we provide support for peudo ops including ADDIStocHA8, ADDIStocHA, LWZtocL, LDtoc, LDtocL for AIX('LWZtoc' is supported by an earlier patch already), lowering them from MIR to assembly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D68341

Files:
  llvm/include/llvm/MC/MCExpr.h
  llvm/lib/MC/MCExpr.cpp
  llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/test/CodeGen/PowerPC/lower-globaladdr32-aix-asm.ll
  llvm/test/CodeGen/PowerPC/lower-globaladdr64-aix-asm.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D68341.222839.patch
Type: text/x-patch
Size: 23947 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191002/203eda9e/attachment.bin>